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EP1C6F256I8 参数 Datasheet PDF下载

EP1C6F256I8图片预览
型号: EP1C6F256I8
PDF下载: 下载PDF文件 查看货源
内容描述: 气旋FPGA系列 [Cyclone FPGA Family]
分类和应用: 可编程逻辑时钟
文件页数/大小: 94 页 / 1066 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Preliminary Information  
Cyclone FPGA Family Data Sheet  
Figure 26. Cyclone PLL Global Clock Connections  
G1  
G3  
G5  
G7  
G0  
G2  
G4  
G6  
g0  
g1  
e
g0  
g1  
e
CLK0  
CLK2  
PLL1  
PLL2  
CLK1 (1)  
CLK3 (2)  
PLL1_OUT (3), (4)  
PLL2_OUT (3), (4)  
Notes to Figure 26:  
(1) PLL 1 supports one single-ended or LVDS input via pins CLK0and CLK1.  
(2) PLL2 supports one single-ended or LVDS input via pins CLK2and CLK3.  
(3) PLL1_OUTand PLL2_OUTsupport single-ended or LVDS output. If external output is not required, these pins are  
available as regular user I/O pins.  
(4) The EP1C3 device in the 100-pin TQFP package does not support external clock output. The EP1C6 device in the  
144-pin TQFP package does not support external clock output from PLL2.  
Altera Corporation  
39  
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