Cyclone Device Handbook, Volume 1
Table 4–52. Cyclone PLL Specifications (Part 2 of 2)
Symbol
Parameter
Min
Max
Unit
fOUT (to global clock)
PLL output frequency
15.625
405
MHz
(-6 speed grade)
PLL output frequency
(-7 speed grade)
15.625
15.625
45.00
320
275
MHz
MHz
%
PLL output frequency
(-8 speed grade)
t
OUT DUTY
Duty cycle for external clock
55
output (when set to 50%)
tJITTER (1)
tLOCK (3)
fVCO
Period jitter for external clock
output
300 (2)
100
ps
Time required to lock from end
of device configuration
10.00
μs
PLL internal VCO operating
range
500.00
1,000
MHz
-
Minimum areset time
Counter values
10
1
ns
N, G0, G1, E
32
integer
Notes to Table 4–52:
(1) The tJITTER specification for the PLL[2..1]_OUTpins are dependent on the I/O pins in its VCCIO bank, how many
of them are switching outputs, how much they toggle, and whether or not they use programmable current strength
or slow slew rate.
(2) fOUT ≥ 100 MHz. When the PLL external clock output frequency (fOUT) is smaller than 100 MHz, the jitter
specification is 60 mUI.
(3) fIN/N must be greater than 200 MHz to ensure correct lock detect circuit operation below –20 C. Otherwise, the PLL
operates with the specified parameters under the specified conditions.
4–30
Preliminary
Altera Corporation
January 2007
ALTERA [ ALTERA CORPORATION ]
