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EP1C20F400C7ES 参数 Datasheet PDF下载

EP1C20F400C7ES图片预览
型号: EP1C20F400C7ES
PDF下载: 下载PDF文件 查看货源
内容描述: 气旋FPGA系列数据手册 [Cyclone FPGA Family Data Sheet]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 104 页 / 1353 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Logic Elements  
functions. Another special packing mode allows the register output to  
feed back into the LUT of the same LE so that the register is packed with  
its own fan-out LUT. This provides another mechanism for improved  
fitting. The LE can also drive out registered and unregistered versions of  
the LUT output.  
LUT Chain & Register Chain  
In addition to the three general routing outputs, the LEs within an LAB  
have LUT chain and register chain outputs. LUT chain connections allow  
LUTs within the same LAB to cascade together for wide input functions.  
Register chain outputs allow registers within the same LAB to cascade  
together. The register chain output allows an LAB to use LUTs for a single  
combinatorial function and the registers to be used for an unrelated shift  
register implementation. These resources speed up connections between  
LABs while saving local interconnect resources. “MultiTrack  
Interconnect” on page 2–12 for more information on LUT chain and  
register chain connections.  
addnsub Signal  
The LE's dynamic adder/subtractor feature saves logic resources by  
using one set of LEs to implement both an adder and a subtractor. This  
feature is controlled by the LAB-wide control signal addnsub. The  
addnsubsignal sets the LAB to perform either A + B or A B. The LUT  
computes addition; subtraction is computed by adding the two's  
complement of the intended subtractor. The LAB-wide signal converts to  
two's complement by inverting the B bits within the LAB and setting  
carry-in = 1 to add one to the least significant bit (LSB). The LSB of an  
adder/subtractor must be placed in the first LE of the LAB, where the  
LAB-wide addnsubsignal automatically sets the carry-in to 1. The  
Quartus II Compiler automatically places and uses the adder/subtractor  
feature when using adder/subtractor parameterized functions.  
LE Operating Modes  
The Cyclone LE can operate in one of the following modes:  
Normal mode  
Dynamic arithmetic mode  
Each mode uses LE resources differently. In each mode, eight available  
inputs to the LEthe four data inputs from the LAB local interconnect,  
carry-in0and carry-in1from the previous LE, the LAB carry-in  
from the previous carry-chain LAB, and the register chain connectionare  
directed to different destinations to implement the desired logic function.  
LAB-wide signals provide clock, asynchronous clear, asynchronous  
Altera Corporation  
January 2007  
2–7  
Preliminary  
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