Chapter 4: DC and Switching Characteristics
4–89
Maximum Input and Output Clock Toggle Rate
Table 4–104. Arria GX Maximum Input Clock Rate for Dedicated Clock Pins (Part 2 of 2)
I/O Standards
–6 Speed Grade
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
3.3-V PCI-X
373
467
467
467
467
467
467
233
467
467
SSTL-18 CLASS I
SSTL-18 CLASS II
1.8-V HSTL CLASS I
1.8-V HSTL CLASS II
1.5-V HSTL CLASS I
1.5-V HSTL CLASS II
1.2-V HSTL
DIFFERENTAL SSTL-2
DIFFERENTIAL 2.5-V
SSTL CLASS II
DIFFERENTIAL 1.8-V
SSTL CLASS I
467
467
467
467
MHz
MHz
MHz
MHz
DIFFERENTIAL 1.8-V
SSTL CLASS II
DIFFERENTIAL 1.8-V
HSTL CLASS I
DIFFERENTIAL 1.8-V
HSTL CLASS II
DIFFERENTIAL 1.5-V
HSTL CLASS I
467
467
233
MHz
MHz
MHz
DIFFERENTIAL 1.5-V
HSTL CLASS II
DIFFERENTIAL 1.2-V
HSTL
LVDS
640
373
MHz
MHz
LVDS (1)
Note to Table 4–104:
(1) This set of numbers refers to the VIO dedicated input clock pins.
Table 4–105 shows the maximum output clock toggle rates for Arria GX device
column I/O pins.
Table 4–105. Arria GX Maximum Output Toggle Rate for Column I/O Pins (Part 1 of 3)
I/O Standards
Drive Strength
4 mA
–6 Speed Grade
Units
MHz
MHz
MHz
MHz
MHz
MHz
196
303
393
486
570
626
8 mA
12 mA
3.3-V LVTTL
16 mA
20 mA
24 mA
© December 2009 Altera Corporation
Arria GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
