4–88
Chapter 4: DC and Switching Characteristics
Maximum Input and Output Clock Toggle Rate
Table 4–102. Arria GX Maximum Input Toggle Rate for Column I/O Pins
I/O Standards
SSTL-18 CLASS II
1.8-V HSTL CLASS I
1.8-V HSTL CLASS II
1.5-V HSTL CLASS I
1.5-V HSTL CLASS II
3.3-V PCI
–6 Speed Grade
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
467
467
467
467
467
420
420
3.3-V PCI-X
Table 4–103 shows the maximum input clock toggle rates for Arria GX device row I/O
pins.
Table 4–103. Arria GX Maximum Input Toggle Rate for Row I/O Pins
I/O Standards
3.3-V LVTTL
–6 Speed Grade
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
420
420
420
420
420
467
467
467
467
467
467
467
467
392
3.3-V LVCMOS
2.5 V
1.8 V
1.5 V
SSTL-2 CLASS I
SSTL-2 CLASS II
SSTL-18 CLASS I
SSTL-18 CLASS II
1.8-V HSTL CLASS I
1.8-V HSTL CLASS II
1.5-V HSTL CLASS I
1.5-V HSTL CLASS II
LVDS
Table 4–104 shows the maximum input clock toggle rates for Arria GX device
dedicated clock pins.
Table 4–104. Arria GX Maximum Input Clock Rate for Dedicated Clock Pins (Part 1 of 2)
I/O Standards
3.3-V LVTTL
–6 Speed Grade
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
373
373
373
373
373
467
467
373
3.3-V LVCMOS
2.5 V
1.8 V
1.5 V
SSTL-2 CLASS I
SSTL-2 CLASS II
3.3-V PCI
Arria GX Device Handbook, Volume 1
© December 2009 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
