Arria GX Device Family Overview
across densities, the designer must cross-reference the available I/O pins
using the device pin-outs for all planned densities of a given package type
to identify which I/O pins are migratable.
Table 1–2. Arria GX Package Options (Pin Counts and Transceiver Channels)
Source-Synchronous
Channels
Maximum User I/O Pin Count
Transceiver
Channels
Device
484-Pin FBGA 780-Pin FBGA 1152-PinFBGA
Receive
Transmit
(23 mm)
(29 mm)
(35 mm)
EP1AGX20C
EP1AGX35C
EP1AGX50C
EP1AGX60C
EP1AGX35D
EP1AGX50D
EP1AGX60D
EP1AGX60E
EP1AGX90E
4
4
31
31
29
29
230
230
229
229
—
341
—
—
—
4
31
29
—
—
4
31
29
—
—
8
31
29
341
350
350
—
—
8
31, 42
31
29, 42
29
—
514
—
8
—
12
12
42
42
—
514
538
47
45
—
—
Table 1–3 lists the Arria GX device package sizes.
Table 1–3. Arria GX FBGA Package Sizes
Dimension
484 Pins
780 Pins
1152 Pins
Pitch (mm)
1.00
529
1.00
841
1.00
1225
Area (mm2)
Length × width
(mm × mm)
23 × 23
29 × 29
35 × 35
1–4
Altera Corporation
May 2008
Arria GX Device Handbook, Volume 1