FLEX 10K Embedded Programmable Logic Family Data Sheet
MultiVolt I/O Interface
The FLEX 10K device architecture supports the MultiVolt I/O interface
feature, which allows FLEX 10K devices to interface with systems of
differing supply voltages. These devices have one set of V pins for
CC
internal operation and input buffers (VCCINT) and another set for I/O
output drivers (VCCIO).
Table 12 describes the FLEX 10K device supply voltages and MultiVolt
I/O support levels.
Table 12. Supply Voltages & MultiVolt I/O Support Levels
Devices
Supply Voltage (V)
MultiVolt I/O Support Levels (V)
V
V
Input
Output
CCINT
5.0
5.0
3.3
3.3
3.3
3.3
CCIO
FLEX 10K
5.0
3.3
3.3
3.3
3.3
2.5
3.3 or 5.0
5.0
3.3 or 5.0
3.3 or 5.0
3.3 or 5.0
3.3 or 5.0
3.3 or 5.0
2.5
EPF10K50V
EPF10K130V
FLEX 10KA
3.3 or 5.0
3.3 or 5.0
2.5, 3.3, or 5.0
2.5, 3.3, or 5.0
Power Sequencing & Hot-Socketing
Because FLEX 10K devices can be used in a multi-voltage environment,
they have been designed specifically to tolerate any possible power-up
sequence. The V
order.
and V
power planes can be powered in any
CCIO
CCINT
Signals can be driven into FLEX 10KA devices before and during power
up without damaging the device. Additionally, FLEX 10KA devices do
not drive out during power up. Once operating conditions are reached,
FLEX 10KA devices operate as specified by the user.
All FLEX 10K devices provide JTAG BST circuitry that complies with the
IEEE Std. 1149.1-1990 specification. All FLEX 10K devices can also be
configured using the JTAG pins through the BitBlaster serial download
cable, ByteBlaster parallel port download cable, or ByteBlasterMV parallel
port download cable, or via hardware that uses the JamTM programming
and test language. JTAG BST can be performed before or after
configuration, but not during configuration. FLEX 10K devices support
the JTAG instructions shown in Table 13.
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
Altera Corporation
39
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