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DSF10K 参数 Datasheet PDF下载

DSF10K图片预览
型号: DSF10K
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式可编程逻辑系列 [EMBEDDED PROGRAMMABLE LOGIC FAMILY]
分类和应用: 可编程逻辑
文件页数/大小: 138 页 / 1955 K
品牌: ALTERA [ ALTERA CORPORATION ]
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FLEX 10K Embedded Programmable Logic Family Data Sheet  
Clamping diodes are controlled on a pin-by-pin basis via a logic option in  
the MAX+PLUS II software. When V is 3.3 V, a pin that has the  
CCIO  
clamping diode turned on can be driven by a 2.5-V or 3.3-V signal, but not  
a 5.0-V signal. When V is 2.5 V, a pin that has the clamping diode  
CCIO  
turned on can be driven by a 2.5-V signal, but not a 3.3-V or 5.0-V signal.  
However, a clamping diode can be turned on for a subset of pins, which  
allows devices to bridge between a 3.3-V PCI bus and a 5.0-V device.  
Slew-Rate Control  
The output buffer in each IOE has an adjustable output slew rate that can  
be configured for low-noise or high-speed performance. A slower slew  
rate reduces system noise and adds a maximum delay of approximately  
2.9 ns. The fast slew rate should be used for speed-critical outputs in  
systems that are adequately protected against noise. Designers can specify  
the slew rate on a pin-by-pin basis during design entry or assign a default  
slew rate to all pins on a device-wide basis. The slow slew rate setting  
affects only the falling edge of the output.  
Open-Drain Output Option  
FLEX 10K devices provide an optional open-drain (electrically equivalent  
to an open-collector) output for each I/O pin. This open-drain output  
enables the device to provide system-level control signals (e.g., interrupt  
and write enable signals) that can be asserted by any of several devices. It  
can also provide an additional wired-ORplane. Additionally, the  
MAX+PLUS II software can convert tri-state buffers with grounded data  
inputs to open-drain pins automatically.  
Open-drain output pins on FLEX 10K devices (with a pull-up resistor to  
the 5.0-V supply) can drive 5.0-V CMOS input pins that require a V of  
IH  
3.5 V. When the open-drain pin is active, it will drive low. When the pin  
is inactive, the trace will be pulled up to 5.0 V by the resistor. The open-  
drain pin will only drive low or tri-state; it will never drive high. The rise  
time is dependent on the value of the pull-up resistor and load  
impedance. The I current specification should be considered when  
OL  
selecting a pull-up resistor.  
Output pins on 5.0-V FLEX 10K devices with V  
= 3.3 V or 5.0 V (with  
CCIO  
a pull-up resistor to the 5.0-V supply) can also drive 5.0-V CMOS input  
pins. In this case, the pull-up transistor will turn off when the pin voltage  
exceeds 3.3 V. Therefore, the pin does not have to be open-drain.  
38  
Altera Corporation  
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