Stratix II and Stratix II GX I/O Standards Support
■
■
■
On-chip differential termination
Peripheral component interconnect (PCI) clamping diode
Hot socketing
f
For a detailed description of each I/O feature, refer to the Stratix II
Architecture chapter in volume 1 of the Stratix II Device Handbook or the
Stratix II GX Architecture chapter in volume 1 of the Stratix II GX Device
Handbook.
Stratix II and Stratix II GX devices support a wide range of industry I/O
standards. Table 4–1 shows which I/O standards Stratix II devices
support as well as typical applications.
Stratix II and
Stratix II GX I/O
Standards
Table 4–1. Stratix II and Stratix II GX I/O Standard Applications (Part 1 of 2)
Support
I/O Standard
Application
LVTTL
LVCMOS
2.5 V
General purpose
General purpose
General purpose
General purpose
General purpose
PC and embedded system
PC and embedded system
DDR SDRAM
1.8 V
1.5 V
3.3-V PCI
3.3-V PCI-X
SSTL-2 Class I
SSTL-2 Class II
DDR SDRAM
SSTL-18 Class I
DDR2 SDRAM
SSTL-18 Class II
DDR2 SDRAM
1.8-V HSTL Class I
QDRII SRAM/RLDRAM II/SRAM
QDRII SRAM/RLDRAM II/SRAM
QDRII SRAM/SRAM
QDRII SRAM/SRAM
General purpose
DDR SDRAM
1.8-V HSTL Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
1.2-V HSTL
Differential SSTL-2 Class I
Differential SSTL-2 Class II
Differential SSTL-18 Class I
Differential SSTL-18 Class II
1.8-V differential HSTL Class I
1.8-V differential HSTL Class II
1.5-V differential HSTL Class I
DDR SDRAM
DDR2 SDRAM
DDR2 SDRAM
Clock interfaces
Clock interfaces
Clock interfaces
4–2
Altera Corporation
January 2008
Stratix II Device Handbook, Volume 2