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CLK12P 参数 Datasheet PDF下载

CLK12P图片预览
型号: CLK12P
PDF下载: 下载PDF文件 查看货源
内容描述: 的Stratix II器件手册,卷1 [Stratix II Device Handbook, Volume 1]
分类和应用:
文件页数/大小: 768 页 / 5210 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Selectable I/O Standards in Stratix II and Stratix II GX Devices  
1
Stratix II and Stratix II GX devices support both input and  
output levels for 2.5-V operation with VCCIO voltage level  
support of 2.5 V 5%, which is narrower than defined in the  
Normal Range of the EIA/JEDEC standard.  
1.8 V  
The 1.8-V I/O standard is formulated under EIA/JEDEC Standard,  
EIA/JESD8-7: 1.8-V 0.15-V (Normal Range), and 1.2-V – 1.95-V (Wide  
Range) Power Supply Voltage and Interface Standard for  
Non-Terminated Digital Integrated Circuit.  
The standard defines the DC interface parameters for high-speed,  
low-voltage, non-terminated digital circuits driving or being driven by  
other 1.8-V devices. This standard is a general-purpose, single-ended  
standard used for 1.8-V applications. It does not require the use of a VREF  
or a VTT.  
1
Stratix II and Stratix II GX devices support both input and  
output levels for 1.8-V operation with VCCIO voltage level  
support of 1.8 V 5%, which is narrower than defined in the  
Normal Range of the EIA/JEDEC standard.  
1.5 V  
The 1.5-V I/O standard is formulated under EIA/JEDEC Standard,  
JESD8-11: 1.5-V 0.1-V (Normal Range) and 0.9-V – 1.6-V (Wide Range)  
Power Supply Voltage and Interface Standard for Non-Terminated  
Digital Integrated Circuit.  
The standard defines the DC interface parameters for high-speed,  
low-voltage, non-terminated digital circuits driving or being driven by  
other 1.5-V devices. This standard is a general-purpose, single-ended  
standard used for 1.5-V applications. It does not require the use of a VREF  
or a VTT.  
1
Stratix II and Stratix II GX devices support both input and  
output levels for 1.5-V operation VCCIO voltage level support of  
1.5 V 5%, which is narrower than defined in the Normal Range  
of the EIA/JEDEC standard.  
3.3-V PCI  
The 3.3-V PCI I/O standard is formulated under PCI Local Bus  
Specification Revision 2.2 developed by the PCI Special Interest Group  
(SIG).  
Altera Corporation  
January 2008  
4–5  
Stratix II Device Handbook, Volume 2  
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