External Memory Standards
The following sections briefly describe the external memory standards
supported by Stratix II and Stratix II GX devices. Altera offers a complete
solution for these memories, including clear-text data path, memory
controller, and timing analysis.
External
Memory
Standards
DDR and DDR2 SDRAM
DDR SDRAM is a memory architecture that transmits and receives data
at twice the clock speed. These devices transfer data on both the rising
and falling edge of the clock signal. DDR2 SDRAM is a second generation
memory based on the DDR SDRAM architecture and transfers data to
Stratix II and Stratix II GX devices at up to 333 MHz/667 Mbps. Stratix II
and Stratix II GX devices can support DDR SDRAM at up to
200 MHz/400 Mbps. For PLL-based implementations, Stratix II and
Stratix II GX devices support DDR and DDR2 SDRAM up to 150 MHz
and 200 MHz, respectively.
Interface Pins
DDR and DDR2 SDRAM devices use interface pins such as data (DQ),
data strobe (DQS), clock, command, and address pins. Data is sent and
captured at twice the system clock rate by transferring data on the clock’s
positive and negative edge. The commands and addresses still only use
one active (positive) edge of a clock. DDR and DDR2 SDRAM use
single-ended data strobes (DQS). DDR2 SDRAM can also use optional
differential data strobes (DQS and DQS#). However, Stratix II and
Stratix II GX devices do not use the optional differential data strobes for
DDR2 SDRAM interfaces since DQS and DQSn pins in Stratix II and
Stratix II GX devices are not differential. You can leave the DDR SDRAM
memory DQS# pin unconnected. Only the shifted DQS signal from the
DQS logic block is used to capture data.
DDR and DDR2 SDRAM ×16 devices use two DQS pins, and each DQS
pin is associated with eight DQ pins. However, this is not the same as the
×16/×18 mode in Stratix II and Stratix II GX devices (see “Data and Data
Strobe Pins” on page 3–14). To support a ×16 DDR SDRAM device, you
need to configure Stratix II and Stratix II GX devices to use two sets of DQ
pins in ×8/×9 mode. Similarly if your ×32 memory device uses four DQS
pins where each DQS pin is associated with eight DQ pins, you need to
configure Stratix II and Stratix II GX devices to use four sets of DQS/DQ
groups in ×8/×9 mode.
Connect the memory device’s DQ and DQS pins to Stratix II and
Stratix II GX DQ and DQS pins, respectively, as listed in Stratix II and
Stratix II GX pin tables. DDR and DDR2 SDRAM also uses active-high
data mask, DM, pins for writes. You can connect the memory’s DM pins
3–4
Altera Corporation
Stratix II Device Handbook, Volume 2
January 2008
ALTERA [ ALTERA CORPORATION ]
