2–8
Chapter 2: Board Components
Connectors
Connectors
This section describes the connectors available on the development board.
GPIO Headers
There are two general-purpose 2×20-pin 0.1-inch expansion headers to allow the
addition of daughtercards for supplementary board features and functions.
Table 2–15 lists the GPIO header A schematic signal names and their corresponding
MAX V CPLD device pin numbers.
Table 2–8. GPIO Header A Schematic Signal Names and Functions
Schematic Signal
Name
MAX V CPLD Device
Pin Number
Board Reference
Description
GPIO connector A pin
I/O Standard
J6.1
J6.2
AGPIO_1
AGPIO_2
AGPIO_3
AGPIO_4
AGPIO_5
AGPIO_6
AGPIO_7
AGPIO_8
AGPIO_9
AGPIO_10
5VIN_CONN
GND
P2
M4
L4
N3
N2
N1
M3
M2
M1
L3
—
—
L1
L2
K2
K3
J3
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
Power
J6.3
J6.4
J6.5
3.3-V
J6.6
J6.7
J6.8
J6.9
J6.10
J6.11
J6.12
J6.13
J6.14
J6.15
J6.16
J6.17
J6.18
J6.19
J6.20
J6.21
J6.22
J6.23
J6.24
J6.25
J6.26
J6.27
J6.28
J6.29
J6.30
5-V
—
Ground
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
GPIO connector A pin
Power
AGPIO_11
AGPIO_12
AGPIO_13
AGPIO_14
AGPIO_15
AGPIO_16
AGPIO_17
AGPIO_18
AGPIO_19
AGPIO_20
AGPIO_21
AGPIO_22
AGPIO_23
AGPIO_24
AGPIO_25
AGPIO_26
3.3VIN_CONN
GND
K1
J1
J2
3.3-V
H2
H3
G3
H1
G1
G2
F2
F3
—
—
Ground
—
MAX V CPLD Development Board Reference Manual
January 2011 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
