Chapter 2: Device Datasheet for Cyclone V Devices
2–19
Switching Characteristics
Table 2–23. PLL Specifications for Cyclone V Devices—Preliminary (1) (Part 2 of 3)
Symbol
tDLOCK
Parameter
Min
Typ
Max
Unit
Time required to lock dynamically (after switchover or
reconfiguring any non-post-scale counters/delays)
—
—
1
ms
PLL closed-loop low bandwidth
—
—
—
—
10
—
—
—
—
0.3
1.5
4
—
—
MHz
MHz
MHz
ps
fCLBW
PLL closed-loop medium bandwidth
(8)
PLL closed-loop high bandwidth
—
tPLL_PSERR
tARESET
Accuracy of PLL phase shift
—
—
—
—
—
—
50
Minimum pulse width on the aresetsignal
Input clock cycle-to-cycle jitter (FREF ≥ 100 MHz)
Input clock cycle-to-cycle jitter (FREF < 100 MHz)
Period jitter for dedicated clock output (FOUT ≥ 100 MHz)
Period jitter for dedicated clock output (FOUT < 100 MHz)
—
ns
0.15
750
UI (p-p)
ps (p-p)
ps (p-p)
mUI (p-p)
(4), (5)
tINCCJ
(1)
TBD
TBD
(6)
tOUTPJ_DC
(1)
(1)
Cycle-to-cycle jitter for dedicated clock output
(FOUT ≥ 100 MHz)
—
—
—
—
—
—
—
—
—
—
TBD
TBD
TBD
TBD
TBD
TBD
ps (p-p)
mUI (p-p)
ps (p-p)
(6)
tOUTCCJ_DC
Cycle-to-cycle jitter for dedicated clock output
(FOUT < 100 MHz)
(1)
(1)
(1)
(1)
(1)
Period jitter for clock output on regular I/O
(FOUT ≥ 100 MHz)
(6), (9)
tOUTPJ_IO
Period jitter for clock output on regular I/O
(FOUT < 100 MHz)
mUI (p-p)
ps (p-p)
Cycle-to-cycle jitter for clock output on regular I/O
(FOUT ≥ 100 MHz)
(6), (9)
tOUTCCJ_IO
Cycle-to-cycle jitter for clock output on regular I/O
(FOUT < 100 MHz)
—
—
—
—
—
—
mUI (p-p)
tOUTPJ_DC_F
tOUTCCJ_DC_F
Period jitter for dedicated clock output in fractional mode
TBD (1)
TBD (1)
—
—
Cycle-to-cycle jitter for dedicated clock output in fractional
mode
Period jitter for clock output on regular I/O in fractional
mode
tOUTPJ_IO_F
—
—
—
—
—
—
—
—
TBD (1)
TBD (1)
—
—
Cycle-to-cycle jitter for clock output on regular I/O in
fractional mode
tOUTCCJ_IO_F
Period jitter for dedicated clock output in cascaded PLLs
(FOUT ≥ 100 MHz)
(1)
TBD
ps (p-p)
mUI (p-p)
tCASC_OUTPJ_DC
(6), (7)
Period jitter for dedicated clock output in cascaded PLLs
(FOUT < 100 MHz)
(1)
TBD
February 2012 Altera Corporation
Cyclone V Device Handbook
Volume 1: Device Overview and Datasheet