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5AGXMA3D631C4N 参数 Datasheet PDF下载

5AGXMA3D631C4N图片预览
型号: 5AGXMA3D631C4N
PDF下载: 下载PDF文件 查看货源
内容描述: 阿里亚V器件概述 [Arria V Device Overview]
分类和应用:
文件页数/大小: 37 页 / 793 K
品牌: ALTERA [ ALTERA CORPORATION ]
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AV-51001  
2013.05.06  
2
Summary of Arria V Features  
Advantage  
Supporting Feature  
Lowest system cost  
Requires as low as four power supplies to operate  
Available in thermal composite flip chip ball-grid array (BGA) packaging  
Includes innovative features such as Configuration via Protocol (CvP),  
partial reconfiguration, and design security  
Summary of Arria V Features  
Table 2: Summary of Features for Arria V Devices  
Feature  
Description  
Technology  
TSMC's 28-nm process technology:  
Arria V GX, GT, SX, and ST28-nm low power (28LP) process  
Arria V GZ28-nm high performance (28HP) process  
Lowest static power in its class (less than 1.2 W for 500K logic elements (LEs) at 85°C  
junction under typical conditions)  
0.85 V, 1.1 V, or 1.15 V core nominal voltage  
Packaging  
Thermal composite flip chip BGA packaging  
Multiple device densities with identical package footprints for seamless migration  
between different device densities  
Lead, lead-free (Pb-free), and RoHS-compliant options  
High-performance Enhanced 8-input ALM with four registers  
FPGA fabric  
Improved routing architecture to reduce congestion and improve compilation time  
Internal memory M10K10-kilobits (Kb) memory blocks with soft error correction code (ECC)  
blocks  
(Arria V GX, GT, SX, and ST devices only)  
M20K20-Kb memory blocks with hard ECC (Arria V GZ devices only)  
Memory logic array block (MLAB)-640-bit distributed LUTRAM where you can use  
up to 50% of the ALMs as MLAB memory  
Arria V Device Overview  
Altera Corporation  
Feedback  
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