Intel® MAX® 10 FPGA Device Datasheet
M10-DATASHEET | 2017.12.15
Parameter
Symbol
Condition
Min
—
Typ
—
Max
Unit
(52)
Conversion Rate
Conversion time
—
Single measurement
1
1
1
Cycle
Cycle
Cycle
Continuous measurement
Temperature measurement
—
—
—
—
Related Links
SPICE Models for Intel FPGAs
Periphery Performance Specifications
This section describes the periphery performance, high-speed I/O, and external memory interface.
Actual achievable frequency depends on design and system specific factors. Ensure proper timing closure in your design and
perform HSPICE/IBIS simulations based on your specific design and system setup to determine the maximum achievable
frequency in your system.
High-Speed I/O Specifications
For more information about the high-speed and low-speed I/O performance pins, refer to the respective device pin-out files.
Related Links
Documentation: Pin-Out Files for Intel FPGAs
(52)
For more detailed description, refer to the Timing section in the Intel MAX 10 Analog-to-Digital Converter User Guide.
Intel® MAX® 10 FPGA Device Datasheet
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