Intel® MAX® 10 FPGA Device Datasheet
M10-DATASHEET | 2017.12.15
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Internal VREF, no missing
code
–1
—
1.7
LSB
Integral non linearity
INL
—
–2
—
—
2
LSB
dB
(44)(45)
AC Accuracy
Total harmonic distortion
THD
FIN = 50 kHz, FS = 1 MHz,
PLL
–70
—
(46)
(47)(48)(46)
Signal-to-noise ratio
SNR
FIN = 50 kHz, FS = 1 MHz,
PLL
62
—
—
—
—
dB
dB
(49)
Signal-to-noise and distortion
SINAD
FIN = 50 kHz, FS = 1 MHz,
PLL
61.5
(50)(46)
On-Chip Temperature
Sensor
Temperature sampling rate
Absolute accuracy
TS
—
—
—
—
—
—
50
kSPS
°C
–40 to 125°C,
±5
with 64 samples averaging
(51)
continued...
(44)
(45)
(46)
(47)
(48)
(49)
(50)
(51)
Total harmonic distortion is –65 dB for dual function pin.
THD with prescalar enabled is 6dB less than the specification.
When using internal VREF, THD = 66 dB, SNR = 58 dB and SINAD = 57.5 dB for dedicated ADC input channels.
Signal-to-noise ratio is 54 dB for dual function pin.
SNR with prescalar enabled is 6dB less than the specification.
Signal-to-noise and distortion is 53 dB for dual function pin.
SINAD with prescalar enabled is 6dB less than the specification.
For the Intel Quartus Prime software version 15.0 and later, Altera Modular ADC and Altera Modular Dual ADC IP cores handle the 64
samples averaging. For the Intel Quartus Prime software versions prior to 14.1, you need to implement your own averaging
calculation.
Intel® MAX® 10 FPGA Device Datasheet
34
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