Intel® MAX® 10 FPGA Device Datasheet
M10-DATASHEET | 2017.12.15
Parameter
Integral non linearity
Symbol
INL
Condition
Min
Typ
—
Max
2
Unit
LSB
dB
—
–2
(37)
AC Accuracy
Total harmonic distortion
THD
FIN = 50 kHz, FS = 1 MHz,
PLL
–65
—
—
(38)
(39)
Signal-to-noise ratio
SNR
FIN = 50 kHz, FS = 1 MHz,
PLL
54
—
—
—
—
dB
dB
Signal-to-noise and distortion
SINAD
FIN = 50 kHz, FS = 1 MHz,
PLL
53
On-Chip Temperature
Sensor
Temperature sampling rate
Absolute accuracy
TS
—
—
—
—
—
50
kSPS
°C
–40 to 125°C,
—
±10
with 64 samples averaging
(40)
(41)
Conversion Rate
Conversion time
—
Single measurement
Continuous measurement
Temperature measurement
—
—
—
—
—
—
1
1
1
Cycle
Cycle
Cycle
Related Links
SPICE Models for Intel FPGAs
(37)
(38)
(39)
(40)
THD with prescalar enabled is 6dB less than the specification.
SNR with prescalar enabled is 6dB less than the specification.
SINAD with prescalar enabled is 6dB less than the specification.
For the Intel Quartus Prime software version 15.0 and later, Altera Modular ADC and Altera Modular Dual ADC IP cores handle the 64
samples averaging. For the Intel Quartus Prime software versions prior to 14.1, you need to implement your own averaging
calculation.
(41)
For more detailed description, refer to the Timing section in the Intel MAX 10 Analog-to-Digital Converter User Guide.
Intel® MAX® 10 FPGA Device Datasheet
32
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