AUGUST 2010
AS6C8016A
512K X 16 BIT LOW POWER CMOS SRAM
E
6
P
V
5
K
1
S
A
DATA RETENTION CHARACTERISTICS
Parameter
Symbol
Test Condition
Min Typ MMaaxx Unit
ISB1 Test Condition
(Chip Disabled)1)
VCC for Data Retention
VDR
1.5
-
-
-
3.6
4
V
VCC=1.5V, ISB1 Test Condition
(Chip Disabled)1)
IDR
Data Retention Current
μA
Chip Deselect to Data Retention Time
tSDR
tRDR
0
-
-
-
-
See data retention wave form
ns
Operation Recovery Time
tRC
NOTES
1. See the ISB1 measurement condition of datasheet page 4.
DATA RETENTION WAVE FORM
t
t
RDR
Data Retention Mode
SDR
V
cc
2.7V
2.2V
V
DR
CS > Vcc-0.2V
CS, LB / UB
GND
9
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
