AS4C256M16D3
Figure 55. Active Power-Down Entry and Exit Timing Diagram
T0
T1
T2
Ta0
Ta1
Tb0
Tb1
Tc0
CK#
CK
NOP
NOP
NOP
VALID
VALID
VALID
NOP
NOP
COMMAND
CKE
tPD
tIS
tIH
VALID
tCKE
tIS
tIH
VALID
VALID
ADDRESS
tXP
tCPDED
Enter
Power-Down
Mode
Exit
Power-Down
Mode
NOTE:
VALID command at T0 is ACT, NOP, DES or PRE with still one bank remaining
open after completion of the precharge command.
TIME BREAK
Don't Care
Figure 56. Power-Down Entry after Read and Read with Auto Precharge
CK#
T0
T1
Ta0
Ta1
Ta2
Ta3
Ta4
Ta5
Ta6
Ta7
Ta8
Tb0
Tb1
CK
RD or
RDA
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
VALID
VALID
COMMAND
CKE
tCPDED
tIS
VALID
VALID
ADDRESS
tPD
RL = AL + CL
DQS, DQS#
DQ BL8
Din
b
Din
b+1
Din
b+2
Din
b+3
Din
b+4
Din
b+5
Din
b+6
Din
b+7
Din
b
Din
b+1
Din
b+2
Din
b+3
DQ BC4
tRDPDEN
Power - Down
Entry
TRANSITIONING DATA
Don't Care
TIME BREAK
Confidential
72
Rev. 3.0
Aug. /2014
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
