1Gb DDR3L – AS4C128M8D3L
Figure 45. WRITE(BC4) OTF to Precharge operation
CK#
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
Ta0
Ta1
Ta2
CK
Notes 3
WRITE
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
PRE
NOP
NOP
COMMAND
Notes 5
4 Clocks
tWR
Notes 4
Bank
Col n
ADDRESS
VALID
tWPST
tWPRE
DQS, DQS#
Notes 2
Din
n
Din
n+1
Din
n+2
Din
n+3
DQ
WL = 5
NOTES:
1. BC4 OTF, WL = 5 (CWL = 5, AL = 0)
2. DIN n (or b) = data-in from column n.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BC4 OTF setting activated by MR0[A1:0 = 01] and A12 = 0 during WRITE command at T0.
5. The write recovery time (tWR) starts at the rising clock edge T9 (4 clocks from T5).
TIME BREAK
TRANSITIONING DATA
Don't Care
Confidential
73
Rev. 2.0
Aug. /2014
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
