ASAHI KASEI
[AK5385B]
SWITCHING CHARACTERISTICS
(Ta=25°C; AVDD=4.75 ∼ 5.25V; DVDD=3.0 ∼ 5.25V; CL=20pF)
Parameter
Symbol
min
typ
max
Units
Master Clock Timing
Frequency
fCLK
tCLKL
tCLKH
2.048
14.5
14.5
27.648
MHz
ns
Pulse Width Low
Pulse Width High
ns
LRCK Frequency
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
Duty Cycle
fsn
fsd
fsq
8
54
108
216
55
kHz
kHz
kHz
%
54
108
45
Slave mode
Master mode
50
%
Audio Interface Timing
Slave mode
BICK Period
Normal Speed Mode
tBCK
tBCK
tBCK
tBCKL
tBCKH
tLRB
1/128fsn
1/64fsd
1/64fsq
33
ns
ns
ns
ns
ns
ns
ns
ns
ns
Double Speed Mode
Quad Speed Mode
BICK Pulse Width Low
Pulse Width High
33
LRCK Edge to BICK “↑”
BICK “↑” to LRCK Edge
(Note 11)
(Note 11)
20
tBLR
20
LRCK to SDTO (MSB) (Except I2S mode)
BICK “↓” to SDTO
Master mode
tLRS
20
20
tBSD
BICK Frequency
fBCK
dBCK
tMBLR
tBSD
64fs
50
Hz
%
BICK Duty
BICK “↓” to LRCK
BICK “↓” to SDTO
−20
−20
20
20
ns
ns
Reset Timing
PDN Pulse Width
PDN “↑” to SDTO valid
tPD
(Note 12)
(Note 13)
150
ns
tPDV
516
1/fs
Note 11. BICK rising edge must not occur at the same time as LRCK edge.
Note 12. The AK5385B can be reset by bringing the PDN pin = “L”.
Note 13. This cycle is the number of LRCK rising edges from the PDN pin = “H”. This value is in master mode
This value is longer 1/fs in slave mode than master mode.
MS0406-E-00
2005/08
- 11 -