CONFIDENTIAL
[AK4753]
tLRCKH
LRCK
50%DVDD
tDBF
BICK
(BCKP = "1")
50%DVDD
50%DVDD
BICK
(BCKP = "0")
tSDS
tSDH
VIH
VIL
SDTI
Figure 6. Audio Interface Timing (PLL/EXT Master mode, DSP mode, MSBS = “1”)
50%DVDD
LRCK
tMBLR
BICK
SDTI
50%DVDD
tSDS
tSDH
VIH
VIL
Figure 7. Audio Interface Timing (PLL/EXT Master mode, Except DSP mode)
1/fs
VIH
LRCK
VIL
tLRCKH
tBCK
tBLR
VIH
VIL
BICK
(BCKP = "0")
tBCKH
tBCKL
VIH
VIL
BICK
(BCKP = "1")
Figure 8. Clock Timing (PLL Slave mode; PLL Reference Clock = LRCK or BICK pin, DSP mode, MSBS = “0”)
MS1311-E-00
2011/07
- 15 -