[AK4685]
■ ADC Digital High Pass Filter
The integrated ADC has a digital high pass filter for DC offset cancelling. The cut-off frequency is 1.0Hz at fs=48kHz
and scales with sampling rate (fs).
■ Audio Serial Interface Format
Each PORTA/B/C can select independent audio interface format. DIFA1-0 bits control the PORTA. The MSB pin and
DIFB bit control PORTB. In all modes, the serial data is MSB first, 2’s complement format. The SDTOB1/2 pins are
clocked out on the falling edge of BICKB pin and the SDTIA/C pins are latched on the rising edge of BICKA/C pins. “0”
should be written to LSB bits without data on each SDTIA/C input.
1. PORTA/C Setting
The DIFA1-0 bits and DIFC1-0 bits select following four serial data formats (Table 11).
Mode
DIFA1
DIFA0
SDTIA1
LRCKA
BICKA
(DIFC1) (DIFC0)
L/R
I/O
speed
I/O
bit
0
0
1
1
bit
0
1
0
1
0
1
2
3
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I2S
H/L
H/L
H/L
L/H
I
I
I
I
I
I
I
I
≥ 48fs
≥ 48fs
≥ 48fs
≥ 48fs
(default)
Table 11. Audio Interface Format
2. PORTB Setting
2-1: Normal mode:
MSB pin and DIFB bit select following four serial data formats (Table 12).
Mode
MSB
pin
DIFB
bit
SDTOB1,2
LRCKA
BICKA
L/R
H/L
L/H
H/L
L/H
I/O
I
I
O
O
speed
I/O
0
1
2
3
L
L
H
H
0
1
0
1
24bit, Left justified
24bit, I2S
I
I
≥ 48fs
≥ 48fs
64fs
(default)
(default)
24bit, Left justified
O
O
24bit, I2S
64fs
Table 12. Audio Interface Format
MS1106-E-00
2009/08
- 22 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
