[AK4679]
CONT2: Initial Setting 3
Register
Address
Register Name
CONT2
R/W
D7
D6
BANK[3:0]
R/W
0
D5
D4
D3
LOCKE
R/W
0
D2
CRCE
R/W
0
D1
D0
WDTN
R/W
0
EFEN
R/W
0
W
R
R/W
0
R/W
0
R/W
0
C2h
42h
Default
BANK[3:0]: DSP DLRAM Mode Setting
DSP Delay RAM
Bank1
DLRAM
Partition
Mode
Bank0
Bank2
Linear 8bit
μ-law codec
BANK [3:0]
Bit
Ring 20.4f
Linear 20.4f
0
1
2
3
4
5
0000b
0001b
0010b
0011b
0100b
0101b
16384 words
14336 words
12288 words
10240 words
8192 words
6144 words
0
0
0
0
0
0
0
(default)
2048 words
4096 words
6144 words
8192 words
10240 words
6
0110b
4096 words
12288 words
0
7
8
0111b
1000b
2048 words
0
14336 words
16384 words
0
0
9
1001b
10240 words
0
18432words
10
11
1010b
1011b
8192 words
6144 words
2048 words
4096 words
18432words
18432words
12
13
14
15
1100b
1101b
1110b
1111b
4096 words
2048 words
0
6144 words
8192 words
10240 words
N/A
18432words
18432words
18432words
(N/A: Not available)
LOCKE: Clock Generator Unit Lock Error status selects (Table 129)
0: lock status monitor invalid (default)
1: lock status monitor Enable
CRCE: DSP CRC status selects (Table 129)
0: CRC status monitor invalid (default)
1: CRC status monitor enable
WDTN: WDT Disable Switch of DSP (Table 129)
0: WDT Enable (default)
1: WDT Disable
EFEN: Extended Instruction Enable of DSP
0: Valid (default)
1: Invalid
MS1402-E-06
2013/02
- 186 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
