[AK4675]
No. Pin Name
J10 SDTIA
K9 BICKA
G9 SYNCA
F9 SDTOA
G8 TVDD2
F8 VSS2
I/O
I
Function
Serial Data Input A Pin
I/O Serial Data Clock A Pin
I/O Sync Signal A Pin
O
-
-
-
Serial Data Output A Pin
Digital I/O Power Supply 2 Pin for CODEC
Ground 2 Pin for CODEC
1.6V ~ 3.6V
2.2V ~ 3.6V
E8 PVDD
PLLBT Power Supply Pin
Output Pin for Loop Filter of PLLBT Circuit
This pin must be connected to VSS2 pin with one resistor and capacitor in series.
Output Pin for Loop Filter of PLL Circuit
This pin must be connected to VSS1 pin with one resistor and capacitor in series.
Common Voltage Output Pin, 0.5 x AVDD
Bias voltage of ADC inputs and DAC outputs.
Test Pin
D9 VCOCBT
D10 VCOC
C10 VCOM
A10 TEST
O
O
O
-
This pin must be open.
A9 AVDD
A8 VSS1
-
-
Analog Power Supply Pin for CODEC
Ground 1 Pin for CODEC
2.2V ~ 3.6V
ROUT1
RCN
LOUT1
RCP
ROUT3
LON
LOUT3
LOP
RIN4
IN4−
LIN4
IN4+
RIN3
IN3−
LIN3
IN3+
RIN2
IN2−
LIN2
IN2+
RIN1
IN1−
LIN1
IN1+
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
Rch Stereo Line Output 1 Pin (RCV bit = “0”: Stereo Line Output)
Receiver-Amp Negative Output Pin (RCV bit = “1”: Receiver Output)
Lch Stereo Line Output 1 Pin (RCV bit = “0”: Stereo Line Output)
Receiver-Amp Positive Output Pin (RCV bit = “1”: Receiver Output)
Rch Stereo Line Output 3 Pin (LODIF bit = “0”: Single-ended Stereo Output)
Negative Line Output Pin (LODIF bit = “1”: Full-differential Mono Output)
Lch Stereo Line Output 3 Pin (LODIF bit = “0”: Single-ended Stereo Output)
Positive Line Output Pin (LODIF bit = “1”: Full-differential Mono Output)
Rch Analog Input 4 Pin (MDIF4 bit = “0”: Single-ended Input)
Negative Line Input 4 Pin (MDIF4 bit = “1”: Full-differential Input)
Lch Analog Input 4 Pin (MDIF4 bit = “0”: Single-ended Input)
Positive Line Input 4 Pin (MDIF4 bit = “1”: Full-differential Input)
Rch Analog Input 3 Pin (MDIF3 bit = “0”: Single-ended Input)
Negative Line Input 3 Pin (MDIF3 bit = “1”: Full-differential Input)
Lch Analog Input 3 Pin (MDIF3 bit = “0”: Single-ended Input)
Positive Line Input 3 Pin (MDIF3 bit = “1”: Full-differential Input)
Rch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
Negative Line Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
Lch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
Positive Line Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
Rch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
Negative Line Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Lch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
Positive Line Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Rch Stereo Line Output 2 Pin
B9
A6
B8
B7
D8
B6
A5
C7
B5
A4
B3
I
I
I
O
O
A3
C2 ROUT2S
B1 LOUT2S
Lch Stereo Line Output 2 Pin
MS0963-E-00
2008/05
- 7 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
