[AK4675]
■ Audio Interface Format
Four types of data formats are available and are selected by setting the DIF1-0 bits (Table 16). In all modes, the serial data
is MSB first, 2’s complement format. Audio interface formats can be used in both master and slave modes. LRCK and
BICK are output from the AK4675 in master mode, but must be input to the AK4675 in slave mode.
Mode
DIF1 bit
DIF0 bit
SDTO (ADC)
DSP Mode
MSB justified LSB justified
MSB justified MSB justified
I2S compatible I2S compatible
Table 16. Audio Interface Format
SDTI (DAC)
DSP Mode
BICK
≥ 32fs
≥ 32fs
≥ 32fs
≥ 32fs
Figure
0
1
2
3
0
0
1
1
0
1
0
1
Table 17
Figure 48
Figure 49
Figure 50
(default)
In modes 1-3, the SDTO is clocked out on the falling edge (“↓”) of BICK and the SDTI is latched on the rising edge (“↑”).
In Modes 0 (DSP mode), the audio I/F timing is changed by BCKP and MSBS bits (Table 17).
DIF1
DIF0
MSBS BCKP
Audio Interface Format
Figure
MSB of SDTO is output by the rising edge (“↑”) of the
first BICK after the rising edge (“↑”) of LRCK.
MSB of SDTI is latched by the falling edge (“↓”) of the
BICK just after the output timing of SDTO’s MSB.
MSB of SDTO is output by the falling edge (“↓”) of the
first BICK after the rising edge (“↑”) of LRCK.
MSB of SDTI is latched by the rising edge (“↑”) of the
BICK just after the output timing of SDTO’s MSB.
MSB of SDTO is output by next rising edge (“↑”) of the
falling edge (“↓”) of the first BICK after the rising edge
(“↑”) of LRCK.
MSB of SDTI is latched by the falling edge (“↓”) of the
BICK just after the output timing of SDTO’s MSB.
MSB of SDTO is output by next falling edge (“↓”) of the
rising edge (“↑”) of the first BICK after the rising edge
(“↑”) of LRCK.
0
0
0
1
Figure 44 (default)
Figure 45
Figure 46
0
0
1
1
0
1
Figure 47
MSB of SDTI is latched by the rising edge (“↑”) of the
BICK just after the output timing of SDTO’s MSB.
Table 17. Audio Interface Format in Mode 0
If 16-bit data that ADC outputs is converted to 8-bit data by removing LSB 8-bit, “−1” at 16bit data is converted to “−1”
at 8-bit data. And when the DAC playbacks this 8-bit data, “−1” at 8-bit data will be converted to “−256” at 16-bit data
and this is a large offset. This offset can be removed by adding the offset of “128” to 16-bit data before converting to 8-bit
data.
MS0963-E-00
2008/05
- 60 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
