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AK4675 参数 Datasheet PDF下载

AK4675图片预览
型号: AK4675
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声编解码器与MIC / RCV / HP / SPK- AMP [Stereo CODEC with MIC/RCV/HP/SPK-AMP]
分类和应用: 解码器编解码器
文件页数/大小: 178 页 / 2136 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4675]  
HP/SPK-Amp Block Power-Up/Down Sequence  
1) HP-Amp  
Power Supply  
(1)  
PDNA pin  
(2)  
PMVCMA bit  
PMOSC bit  
PMMHL/R bit  
MCKIA Input  
(3)  
Don’t care  
Don’t care  
PMCP bit  
PVEE pin  
(4)  
0V  
PVEE  
0V  
0s  
(11)  
PMV1 bit  
(5)  
Input Volume  
Output State  
Hi-Z  
VCOMA  
Hi-Z  
PMHPL/R bits  
(6)  
HPMTN bit  
0V  
Normal  
MUTE  
(7)  
MUTE  
(9)  
0V  
HPL/HPR pins  
(10)  
(8)  
Figure 87. HP-Amp Power-up/down Sequence Example  
(1) PDNA pin should be changed from “L” to “H” after power up.  
“L” time of 150ns or more is needed to reset the AK4675.  
The PDNA pin must be held to “L” until all power supply pins are supplied. After that, the PDNA pin should be  
set to “H”.  
(2) PTS1-0, MOFF, HPGA4-0, OSCN, MSEL bits should be set during this period.  
(3) In case of OSCN bit = “0”, the external clock (MCKIA pin) is not needed.  
In case of OSCN bit = “1”, the external clock (MCKIA pin) is needed.  
(4) Power-up of Charge Pump, VCOMA and HP-Amp Mixer & Selector (and the internal clock oscillator in case of  
OSCN bit = “0”): PMCP = PMMHL = PMMHR = PMOSC = PMVCMA bits = “0” Æ “1”  
The PVEE pin becomes PVEE voltage within 10ms (max.) at OSCN bit = “1” or within the time in Table 79 at OSCN  
bit = “1”.  
(5) Power-up of input volume: PMV1 bit = “0” Æ “1”  
Input volume setting (L1V3-0, R1V3-0 bits)  
Input path setting (HPLL1, HPLR1, HPRR1, HPRL1 bits)  
Input volume block is powered-up within 26.3ms (max.) at OSCN bit = “0” or within the time in Table 75 at  
OSCN bit = “1”. Input path and volume can be set when input volume block is powered up.  
(6) If PMCP and PMHPL/R bits are set to “1” at the same time or PMHPL/R bits are set to “1” during the power-up time  
of the Charge Pump circuit, Headphone-Amp is powered-up after the Charge Pump circuit is powered-up.  
(7) Headphone-Amp power-up: PMHPL/R bits = “0” Æ “1”  
Headphone-Amp is in the mute state and outputs the DC offset. Headphone-Amp power-up time depends on the  
setting of OSCN bit. When OSCN bit = “0”, it is 26.3ms (max.) When OSCN bit = “1”, refer to Table 81.  
(8) Headphone-Amp mute release: HPMTN bit = “0” Æ “1”  
Headphone-Amp goes to the normal operation after the transition time. Headphone-Amp mute release time  
depends on the setting of PTS1-0 and MOFF1 bits.  
(9) Headphone-Amp mute: HPMTN bit = “1” Æ “0”  
MS0963-E-00  
2008/05  
- 119 -  
 
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