[AK4675]
(3) Example of ALCA Operation
Table 88 shows the example of the ALCA setting. The ALCA starts from the value of SPGA5-0 bits.
Register Name Comment
Data
0
Parameter
LMTHA
Limiter detection Level
−7.5dBV
ZELMNA
WTMA2-0
REFA5-0
LMATA1-0
RGAINA1-0
ZTMA1-0
ALCA
Limiter Zero crossing Enable
Recovery waiting period
Maximum gain at recovery operation
Limiter ATT Step
Recovery GAIN Step
Zero-crossing Timeout
ALCA Enable bit
0
Limiter Zero Crossing Enable
Typ. 524.8ms (@ OSCN bit = “0”)
101
3CH
00
00
01
1
+18dB
0.5dB
0.5dB
Typ. 32.8ms (@ OSCN bit = “0”)
Enable
Table 88. Example of the ALCA setting
The following registers must not be changed during ALCA operation. These bits should be changed after ALCA
operation is finished by ALCA bit = “0”.
- LMTHA, LMATA1-0, WTMA2-0, RGAINA1-0, REFA5-0, ZTMA1-0, ZELMNA bits
Example:
Limiter: Zero Crossing Enable
Recovery Cycle = typ. 524.8ms (@ OSCN bit = “0”)
Limiter and Recovery Step = 1
Maximum Gain = +18dB
Limiter Detection Level = −7.5dBV
ALCA bit = “1”
ALCA=OFF
WR (SPGA5-0)
(1) Addr=0EH, Data=3CH
WR (REFA5-0)
(2) Addr=0FH, Data=3CH
(3) Addr=10H, Data=0DH
(4) Addr =11H, Data=40H
WR (ZTMA1-0, WTMA2-0)
WR (ZELMNA, LMATA1-0, RGAINA1-0, LMTHA, ALCA=”1”)
ALCA Operation
Note : WR : Write
Figure 83. Registers set-up sequence at ALCA operation
MS0963-E-00
2008/05
- 115 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
