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AK4646_11 参数 Datasheet PDF下载

AK4646_11图片预览
型号: AK4646_11
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声编解码器与MIC / SPK- AMP [Stereo CODEC with MIC/SPK-AMP]
分类和应用: 解码器编解码器
文件页数/大小: 81 页 / 725 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4646]  
System Reset  
Upon power-up, the PDN pin should be “L” and be changed from “L” to “H” after all power supply are supplied. “L” time  
of 150ns or more is needed to reset in the AK4646. This ensures that all internal registers reset to their initial values.  
The ADC enters an initialization cycle that starts when the PMADL or PMADR bit is changed from “0” to “1”. The  
initialization cycle time is 1059/fs=24ms@fs=44.1kHz. During the initialization cycle, the ADC digital data outputs of  
both channels are forced to a 2's compliment, “0”. The ADC output reflects the analog input signal after the initialization  
cycle is complete.  
The DAC outputs unexpected data after PMDAC bit “0” “1” until 67/fs = 1.52ms@fs = 44.1kHz, then the DAC starts  
outputting the normal voltage.  
(Note) The initial data of ADC has the offset data that depends on the condition of the microphone and the cut-off  
frequency of HPF. If this offset isn’t small, don’t use the initial data of ADC.  
Audio Interface Format  
Three types of data formats are available and selected by setting the DIF1-0 bits (Table 16). In all modes, the serial data is  
MSB first, 2’s complement format. Audio interface formats can be used in both master and slave modes. LRCK and BICK  
are output from the AK4646 in master mode, but must be input to the AK4646 in slave mode. The SDTO is clocked out on  
the falling edge (“”) of BICK and the SDTI is latched on the rising edge (“”).  
Mode  
DIF1 bit  
DIF0 bit  
SDTO (ADC)  
N/A  
MSB justified  
MSB justified  
I2S compatible  
SDTI (DAC)  
N/A  
LSB justified  
MSB justified  
I2S compatible  
BICK  
N/A  
32fs  
32fs  
32fs  
Figure  
0
1
2
3
0
0
1
1
0
1
0
1
-
Figure 18  
Figure 19 (default)  
Figure 20  
Table 16. Audio Interface Format  
If 16-bit data that ADC outputs is converted to 8-bit data by removing LSB 8-bit, “1” at 16bit data is converted to “1”  
at 8-bit data. And when the DAC playbacks this 8-bit data, “1” at 8-bit data will be converted to “256” at 16-bit data  
which is a large offset. This offset can be removed by adding the offset of “128” to 16-bit data before converting to 8-bit  
data.  
MS0557-E-05  
2011/01  
- 27 -  
 
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