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AK4627 参数 Datasheet PDF下载

AK4627图片预览
型号: AK4627
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能多通道音频编解码器 [High Performance Multi-channel Audio CODEC]
分类和应用: 解码器编解码器消费电路商用集成电路
文件页数/大小: 46 页 / 660 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4627]  
2. READ Operations  
Set the R/W bit = “1” for the READ operation of the AK4627. After transmission of data, the master can read the next  
address’s data by generating an acknowledge instead of terminating the write cycle after the receipt of the first data word.  
After receiving each data packet the internal 6-bit address counter is incremented by one, and the next data is  
automatically taken into the next address. If the address exceeds 16H prior to generating stop condition, the address  
counter will “roll over” to 00H and the data of 00H will be read out.  
The AK4627 supports two basic read operations: CURRENT ADDRESS READ and RANDOM ADDRESS READ.  
2-1. CURRENT ADDRESS READ  
The AK4627 contains an internal address counter that maintains the address of the last word accessed, incremented by  
one. Therefore, if the last access (either a read or write) was to address “n”, the next CURRENT READ operation would  
access data from the address “n+1”. After receipt of the slave address with R/W bit “1”, the AK4627 generates an  
acknowledge, transmits 1-byte of data to the address set by the internal address counter and increments the internal  
address counter by 1. If the master does not generate an acknowledge but generates a stop condition instead, the AK4627  
ceases transmission.  
S
S
T
O
P
T
A
R
T
R/W="1"  
Slave  
Address  
S
Data(n)  
Data(n+1)  
Data(n+2)  
Data(n+x)  
P
SDA  
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Figure 26. CURRENT ADDRESS READ  
2-2. RANDOM ADDRESS READ  
The random read operation allows the master to access any memory location at random. Prior to issuing a slave address  
with the R/W bit =“1”, the master must execute a “dummy” write operation first. The master issues a start request, a slave  
address (R/W bit = “0”) and then the register address to read. After the register address is acknowledged, the master  
immediately reissues the start request and the slave address with the R/W bit =“1”. The AK4627 then generates an  
acknowledge, 1 byte of data and increments the internal address counter by 1. If the master does not generate an  
acknowledge but generates a stop condition instead, the AK4627 ceases transmission.  
S
T
A
R
T
S
T
A
R
T
S
T
O
P
R/W="0"  
R/W="1"  
Slave  
Address  
Sub  
Address(n)  
Slave  
Address  
S
S
Data(n)  
Data(n+1)  
Data(n+x)  
P
SDA  
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Figure 27. RANDOM ADDRESS READ  
MS1278-E-02  
2012/03  
- 33 -  
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