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AK4627 参数 Datasheet PDF下载

AK4627图片预览
型号: AK4627
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能多通道音频编解码器 [High Performance Multi-channel Audio CODEC]
分类和应用: 解码器编解码器消费电路商用集成电路
文件页数/大小: 46 页 / 660 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4627]  
DAC partial Power-Down Function  
All DACs of AK4627 can be powered-down individually by PDDA1-3 bits. The analog part of DAC is in power-down  
mode by PDDA1-3 bits = “1”, however, the digital part is not powered-down. Even if all DACs were set in power-down  
mode by the partial power-down bits, the digital part continues an operation. The analog output channels which are  
powered-down by PDDA1-3 bits are fixed to the VCOM voltage. Although DZF detection is in operation, DZF detection  
results of these analog output channels are not reflected to DZF1-2 pins. Some click noise occurs in both set-up and  
release of power-down. Mute the analog output externally or set PDDA1-3 bits when PWDAN bit = “0” or RSTN bit =  
“0”, if click noise aversely affects system performance. Figure 20 shows the power-down/up sequences by PDDA1-3 bits.  
PDDA1-3 bit  
Power Down Channel  
DAC Digital  
Normal Operation  
Internal State  
DAC Analog  
Internal State  
Normal Operation  
Power-down  
Normal Operation  
“0”data  
Power-down  
NormalOperation  
GD  
DAC In  
(Digital)  
(1)  
GD  
(3)  
(2)  
(3)  
(3)  
(3)  
(2)  
(4)  
DAC Out  
(Analog)  
8192/fs  
DZF Detect  
Internal State  
(4)  
Normal Operation Channel  
DAC In  
(Digital)  
“0”data  
GD  
GD  
DAC Out  
(Analog)  
8192/fs  
DZF Detect  
Internal State  
Clock In  
MCLK,LRCK,SCLK  
(5)  
(6)  
DZF1/DZF2  
Notes:  
(1) Digital outputs corresponding to analog inputs and analog outputs corresponding to digital inputs have group delay  
(GD).  
(2) Analog outputs of the DAC when powered down by PDDA1-3 bits = “1” are fixed to the VCOM voltage.  
(3) Immediately after PDDA1-3 bits are changed, a click noise occurs at the output of the channel which is changed by  
the own PDDA bits.  
(4) Although DZF detection is in operation, DZF detection results of powered-down DAC analog output channels are  
not reflected to DZF1-2 pins.  
(5) DZF detection of the DAC which is in power-down mode is ignored, and DZF1-2 pins become “H”.  
(6) When signal is input to a DAC, even if other DACs are powered-down by partial power-down by PDDA bits,  
DXF1-2 pins do not become “H”. Mute the analog output externally if the click noise influences system  
applications.  
Figure 20. DAC partial power-down example  
MS1278-E-02  
2012/03  
- 30 -  
 
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