[AK4614]
Parameter
Symbol
min
typ
max
Units
Control Interface Timing (4-wire Serial mode):
CCLK Period
tCCK
tCCKL
tCCKH
tCDS
tCDH
tCSW
tCSS
tCSH
tDCD
tCCZ
200
80
80
40
40
150
50
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
CDTO Delay
50
70
CSN “↑” to CDTO Hi-Z
Control Interface Timing (I2C Bus mode):
SCL Clock Frequency
fSCL
tBUF
-
400
-
-
-
-
-
-
-
1.0
0.3
-
50
400
kHz
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
ns
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
1.3
0.6
1.3
0.6
0.6
0
0.1
-
-
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
SDA Hold Time from SCL Falling
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
(Note 22)
tF
tSU:STO
tSP
Cb
0.6
0
-
Pulse Width of Spike Noise Suppressed by Input Filter
Capacitive load on bus
pF
Power-down & Reset Timing
PDN Pulse Width
PDN “↑” to SDTO valid
(Note 23)
(Note 24)
tPD
tPDV
150
ns
1/fs
518
Note 22. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Note 23. The AK4614 can be reset by setting the PDN pin to “L” upon power-up.
Note 24. These cycles are the numbers of LRCK rising from the PDN pin rising.
Note 25. I2C is a registered trademark of Philips Semiconductors.
MS1025-E-00
2008/10
- 19 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
