[AK4492]
■ Pin Functions
Pin
Name
Protection
Diode
No.
I/O
I
Function
Auto Setting Mode Select Pin in Pin Control Mode
(PSN pin = “H”)
ACKS
“L”: Manual Setting Mode, “H”: Auto Setting Mode
A2
TVDD/DVSS
Chip Address 1 Pin in Register Control Mode
(PSN pin = “L”)
CAD1
TDM0
I
I
I
TDM Mode Select Pin in Pin Control mode (PSN pin=“H”)
A3
A4
TVDD/DVSS
DSD Clock Pin in DSD Mode
(PSN pin=“L”, DSDPATH bit =“0”)
DCLK
INVR
A5 VREFHR
A6 VREFHR
A7 VREFLR
A8 VREFLR
A9 AOUTRN
DEM0
I
I
I
I
I
TVDD/DVSS Rch signal Invert pin in Pin Control Mode
VDDR/VSSR Rch High Level Voltage Reference Input Pin
VDDR/VSSR Rch High Level Voltage Reference Input Pin
VDDR/VSSR Rch Low Level Voltage Reference Input Pin
VDDR/VSSR Rch Low Level Voltage Reference Input Pin
VDDR/VSSR Rch Negative Analog Output Pin
O
I
De-emphasis Enable 0 Pin in Pin Control Mode (PSN pin=“H”)
B1
TVDD/DVSS
DSD Lch Data Input Pin in DSD Mode
(PSN pin = “L”, DSDPATH bit = “0”)
Output Gain Control Pin in Pin Control Mode (PSN pin = “H”)
“L”:Output Level 2.8 Vpp, “H”: Output Level 3.75 Vpp
DSD Rch Data Input Pin in DSD Mode
DSDL
I
I
I
GAIN
B2
TVDD/DVSS
DSDR
(PSN pin = “L”, DSDPATH bit = “0”)
B3
TDM1
I
I
I
TVDD/DVSS TDM Mode Select Pin in Pin Control Mode
TVDD/DVSS Daisy Chain Mode Select Pin in Pin Control Mode
TVDD/DVSS Test mode Enable Pin(Internal pull-down pin)
Right channel Common Voltage Pin,
VDDR/VSSR Normally connected to VREFLR with a 1uF electrolytic cap.
This pin is inhibited to connect other devices.
B4 DCHAIN
B5
B8
TESTE
VCMR
I
B9 AOUTRP
DIF1
O
I
VDDR/VSSR Rch Positive Analog Output Pin
Digital Input Format 1 Pin in Pin Control Mode (PSN pin = “H”)
TVDD/DVSS
TVDD/DVSS
Rch Zero Input Detect Pin in Register Control Mode (PSN pin = “L”)
(Internal pull-down pin)
C1
DZFR
O
I
Heavy Load Mode Enable Pin in Pin Control Mode (PSN pin = “H”)
“L”:Normal Drive Mode, “H”: Heavy Load Drive Mode
Resister Control Interface Pin in Register Control Mode (PSN pin =
“L”) “L”: 3 Wire Serial Mode, “H”: I2C-Bus Mode
Rch Analog Power Supply Pin
HLOAD
C2
I2C
I
C9
C10
VDDR
VDDR
DIF0
-
-
I
-
-
Rch Analog Power Supply Pin
Digital Input Format 0 Pin in Pin Control Mode (PSN pin = “H”)
D1
TVDD/DVSS
Lch Zero Input Detect Pin in Register Control Mode
(PSN pin=“L”)(Internal pull-down pin)
DZFL
O
DIF2
CAD0
I
I
Digital Input Format 2 Pin in Pin Control Mode (PSN pin = “H”)
Chip Address 0 Pin in Register Control Mode (PSN pin = “L”)
Pin Control Mode or Register Control Mode Select Pin
(Internal pull-down pin)
D2
D3
TVDD/DVSS
TVDD/DVSS
PSN
I
“L”: Register Control Mode, “H”: Pin Control Mode
D9
D10
VDDR
VSSR
-
-
-
-
Rch Analog Power Supply Pin
Analog Ground Pin
016011073-E-00
2016/12
- 7 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
