[AK4492]
8. Electrical Characteristics
■ Analog Characteristics
■ PCM Mode
(Ta = 25 C; LDOE pin = “L”, AVDD = TVDD = DVDD = 1.8 V, AVSS = DVSS = VSSL/R = 0 V; VREFHL/R
= VDDL/R = 5.0 V, VREFLL/R= 0V; Input data = 24 bit; BICK = 64 fs; Signal Frequency = 1 kHz; Sampling
Frequency = 44.1 kHz; Measurement bandwidth = 20 Hz ~ 20 kHz; 2 Vrms output mode (GC[2:0] bits =
“000” or GAIN pin = “L”); Heavy load drive mode = off(HLOAD bit = “0” or HLOAD pin = “L”); unless
otherwise specified.)
Parameter
Min.
Typ.
Max.
Unit
Resolution
-
-
32
Bit
Dynamic Characteristics (Note 11)
THD+N fs=44.1kHz
GC[2:0]= “000”
or GAIN=“L”
-
-
-115
-111
-
-
dB
dB
0dBFS
BW=20kHz
GC[2:0]=“100”
or GAIN=“H”
-
-
-
-
-
-
-
-
-
-
-
-
-61
-111
-57
-111
-57
-
-
-
-
-
-
-
-
-
-
-
-
-
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
60dBFS
0dBFS
60dBFS
0dBFS
60dBFS
60dBFS
fs=96kHz
BW=40kHz
fs=192kHz
BW=40kHz
BW=80kHz
-52
123
127
123
127
125
129
120
Dynamic Range (60dBFS with A-weighted)
(Note 12)
(Note 12)
(Note 12)
S/N (A-weighted)
GC[2:0]= “000”
or GAIN=“L”
GC[2:0]= “100”
or GAIN=“H”
Interchannel Isolation (1kHz)
DC Accuracy (Note 13)
Interchannel Gain Mismatch
Gain Drift
110
-
-
0.15
20
2.8
3.75
-
0.3
-
2.95
3.95
-
dB
ppm/C
Vpp
Vpp
Output Voltage GC[2:0]=“000” or GAIN pin=“L” (Note 14)
GC[2:0]=“100” or GAIN pin=“H” (Note 15)
2.65
3.55
400
Load
HLOAD=“0” or HLOAD pin=“L”
Resistance
(Note 16)
Load Capacitance
HLOAD=“1” or HLOAD pin=“H”
300
-
-
-
-
(Note 17)
25
pF
Note 11. Measured by Audio Precision APx555. Averaging mode.
Note 12. The value of as IC single AK4492. It is a calculated value to remove the noise of External Circuit
Figure 74 and the measuring instrument.
Note 13. The value of as IC single AK4492.
Note 14. The analog output voltage with 0dBFS input signal when GC[2:0] bits = “000” or the GAIN pin =
“L” is calculated by the following formula.
AOUTL/R (typ.@0dB) = (AOUT+) (AOUT) = 2.8Vpp (VREFHL/R VREFLL/R)/5.
Note 15. The analog output voltage with 0dBFS input signal when GC[2:0] bits = “100” or the GAIN pin =
“H” is calculated by the following formula.
AOUTL/R (typ.@0dB) = (AOUT+) (AOUT) = 3.75Vpp (VREFHL/R VREFLL/R)/5.
Note 16. The load resistance value with respect to ground. 10.3 System Design Analog Output shows the
circuits and the calculataion example.
Note 17. The load capacitance value with respect to ground. Analog characteristics are sensitive to
capacitive load that is connected to the output pin. Therefore the capacitive load must be
minimized.
Note 18. It is recommended to use a resistor with 0.1% absolute error for the output stage of the adding
circuit.
016011073-E-00
2016/12
- 12 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
