[AK4480]
SYSTEM DESIGN
Figure 17 shows the system connection diagram. Figure 19, Figure 20 and Figure 21 show the analog output circuit
examples. An evaluation board (AKD4480) demonstrates the optimum layout, power supply arrangements and
measurement results.
Digital 5.0V
1
2
CSN
LRCK 30
CAD0
SDATA 29
Micro-
3
4
CCLK
CDTI
BICK 28
PDN 27
Controller
DSP
+
5
6
CAD1
DZFL
DVDD 26
VSS4 25
0.1u
10u
MCLK
7
8
DIF2
PSN
24
AK4480
Top
+
AVDD 23
View
0.1u
10u
DZFR
9
VSS3 22
10 AOUTRP
AOUTRN
AOUTLP 21
Rch
Mute
Lch
Mute
Rch
LPF
Lch
LPF
Lch Out
Rch Out
11
AOUTLN 20
VSS2 19
12 VSS1
0.1u
0.1u
10u
+
+
0.1u
0.1u
10u
+
+
VDDL
13 VDDR
18
14 VREFHR
VREFHL 17
VREFLL 16
10u
10u
15 VREFLR
Digital
Ground
Analog
Ground
Analog 5.0V
+
Elec trolytic Capacitor
Ceramic Capacitor
Notes:
- Power lines of AVDD and DVDD should be distributed separately from regulators with keeping low impedance.
- VSS1/2/3/4 must be connected to the same analog ground plane.
- When AOUT drives a capacitive load, some resistance should be added in series between AOUT and the
capacitive load.
- All input pins except pull-down/pull-up pins should not be allowed to float.
Figure 17. Typical Connection Diagram (AVDD=5V, DVDD=5V, Serial Control Mode)
MS1146-E-03
2012/01
- 38 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
