[AK4372]
SDA
SCL
S
P
start condition
stop condition
Figure 47. START and STOP Conditions
DATA
OUTPUT BY
TRANSMITTER
not acknowledge
DATA
OUTPUT BY
RECEIVER
acknowledge
SCL FROM
MASTER
2
1
8
9
S
clock pulse for
acknowledgement
START
CONDITION
Figure 48. Acknowledge on the I2C-Bus
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 49. Bit Transfer on the I2C-Bus
MS0684-E-02
2008/12
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