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AK4372 参数 Datasheet PDF下载

AK4372图片预览
型号: AK4372
PDF下载: 下载PDF文件 查看货源
内容描述: DAC内置有PLL和HP- AMP [DAC with built-in PLL & HP-AMP]
分类和应用:
文件页数/大小: 62 页 / 1025 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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[AK4372]  
Serial Control Interface  
(1) 3-wire Serial Control Mode (I2C pin = “L”)  
Internal registers may be written to via the 3-wire μP interface pins (CSN, CCLK and CDTI). The data on this interface  
consists of the Chip address (2-bits, Fixed to “01”), Read/Write (1-bit, Fixed to “1”, Write only), Register address (MSB  
first, 5-bits) and Control data (MSB first, 8-bits). Address and data are clocked in on the rising edge of CCLK. For write  
operations, the data is latched after a low-to-high transition of the 16th CCLK. CSN should be set to “H” once after 16  
CCLKs for each address. The clock speed of CCLK is 5MHz(max). The value of the internal registers is initialized at the  
PDN pin = “L”.  
CSN  
2
6
7
8
9
10 11  
12 13 14 15  
0
1
3
4
5
Clock, “H” or “L”  
“H” or “L”  
Clock, “H” or “L”  
CCLK  
CDTI  
R/W  
C1 C0  
A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 “H” or “L”  
C1-C0: Chip Address (Fixed to “01”)  
R/W:  
READ/WRITE (Fixed to “1”, Write only)  
A4-A0: Register Address  
D7-D0: Control Data  
Figure 40. 3-wire Serial Control I/F Timing  
MS0684-E-02  
2008/12  
- 47 -  
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