[AK4372]
■ Serial Data Interface
The AK4372 interfaces with external systems via the SDATA, BICK and LRCK pins. Five data formats are available,
selected by setting the DIF2, DIF1 and DIF0 bits (Table 16). Mode 0 is compatible with existing 16-bit DACs and digital
filters. Mode 1 is a 20-bit version of Mode 0. Mode 4 is a 24-bit version of Mode 0. Mode 2 is similar to AKM ADCs and
many DSP serial ports. Mode 3 is compatible with the I2S serial data protocol. In Modes 2 and 3 with BICK≥48fs, the
following formats are also valid: 16-bit data followed by eight zeros (17th to 24th bits) and 20-bit data followed by four
zeros (21st to 24th bits). In all modes, the serial data is MSB first and 2’s complement format.
When master mode and BICK=32fs(BF bit = “0”), the AK4372 cannot be set to Mode 1 Mode 2 or Mode 4.
Mode DIF2
DIF1 DIF0
Format
BICK
Figure
0
1
2
3
4
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
0: 16bit, LSB justified
1: 20bit, LSB justified
2: 24bit, MSB justified
3: I2S Compatible
Figure 17
Figure 18
Figure 19 (default)
Figure 20
Figure 18
32fs ≤ BICK ≤ 64fs
40fs ≤ BICK ≤ 64fs
48fs ≤ BICK ≤ 64fs
BICK=32fs or 48fs ≤ BICK ≤ 64fs
48fs ≤ BICK ≤ 64fs
4: 24bit, LSB justified
Table 16. Audio Data Format
LRCK
BICK
(32fs)
SDATA
Mode 0
15 14
6
5
4
3
2
1
0
0
15 14
6
5
4
3
2
1
0
0
15 14
BICK
SDATA
Mode 0
Don’t care
15 14
Don’t care
15 14
15:MSB, 0:LSB
Lch Data
Rch Data
Figure 17. Mode 0 Timing (LRP = BCKP bits = “0”)
LRCK
BICK
SDATA
Mode 1
Don’t care
19
0
0
Don’t care
Don’t care
19
0
0
19:MSB, 0:LSB
SDATA
Mode 4
Don’t care
23 22 21 20 19
23 22 21 20 19
23:MSB, 0:LSB
Lch Data
Rch Data
Figure 18. Mode 1, 4 Timing (LRP = BCKP bits = “0”)
MS0684-E-02
2008/12
- 24 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
