[AK4344]
■ De-emphasis Filter
A digital de-emphasis filter is available for 32, 44.1 or 48kHz sampling rates (tc = 50/15µs) and is controlled by DEM0
and DEM1. In case of double speed and quad speed mode, the digital de-emphasis filter is always off.
DEM1
DEM0
Mode
0
0
1
1
0
1
0
1
44.1kHz
OFF
(default)
48kHz
32kHz
Table 4. De-emphasis Filter Control (Normal Speed Mode)
■ Power-down
The AK4344 is placed in the power-down mode by bringing PDN pin = “L”. and the digital filter is reset at the same time.
This reset should always be done after power up.
PDN
(1)
Internal
State
Normal Operation
Power-down
Normal Operation
D/A In
(Digital)
“0” data
GD
GD
(2)
(2)
(4)
(3)
(4)
D/A Out
(Analog)
Clock In
MCLK, BICK, LRCK
(5)
Don’t care
External
MUTE
(6)
Mute ON
Notes:
(1) PDN pin should be “L” for 19ms or more when an electrolytic capacitor 4.7μF is attached between VCOM pin and
VSS.
(2) The analog output corresponding to digital input has the group delay (GD).
(3) When PDN pin = “L”, the analog output is Hi-Z.
(4) Click noise occurs in 3 ∼ 4LRCK at both edges (↑ ↓) of PDN signal. This noise is output even if “0” data is input.
(5) The external clocks (MCLK, BICK and LRCK) can be stopped in the power down mode (PDN pin = “L”).
(6) Please mute the analog output externally if the click noise (4) influences system application. The timing example
is shown in this figure.
Figure 14. Power-down/up sequence example
MS0641-E-00
2007/06
- 14 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
