[AK4129]
ILRCK
0
1
2
3
21 22 23 24 25
0
1
2
21 22 23 24 25
0
1
IBICK(64fs)
SDTI(i)
23 22
4
3
2
1
0
Don't Care 23 22
4
3
2
1
0
Don't Care
23:MSB, 0:LSB
Lch Data
Rch Data
Figure 17. Mode 3 Timing (24bit I2S)
ILRCK
0
1
2
8
9
24
31 0
1
2
8
9
24
31 0 1
IBICK(64fs)
SDTI(i)
Don't Care 23
23:MSB, 0:LSB
8
1
0
Don't Care 23
8
1 0
Lch Data
Rch Data
Figure 18. Mode 4 Timing (24bit, LSB justified)
Note: SDTI is identified as SDTI1, SDTI2, and SDTI3, ILRCK is identified as ILRCK1, ILRCK2, and ILRCK3, IBICK is
identified as IBICK1, IBICK2, and IBICK3.
256 IBICK
ILRCK1(I)
IBICK1 (I: 256FSI)
SDTI1(I)
23 22
0
23 22
0
23 22
0
23 22
0
23 22
0
23 22
0
23 22
L1
32 IBICK
R1
32 IBICK
L2
32 IBICK
R2
32 IBICK
L3
32 IBICK
R3
32 IBICK
Figure 19. Mode 5 Timing (TDM, 24bit, MSB justified, SDTI2-3: Don’t care)
256 IBICK
ILRCK1(I)
IBICK1(I: 256FSI)
SDTI1(I)
23
0
23
0
23
0
23
0
23
0
23
0
23
L1
32 IBICK
R1
32 IBICK
L2
32 IBICK
R2
32 IBICK
L3
32 IBICK
R3
32 IBICK
Figure 20. Mode 6 Timing (TDM, I2S, SDTI2-3: Don’t care)
MS1173-E-01
2010/09
- 22 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
