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AK4122VQ 参数 Datasheet PDF下载

AK4122VQ图片预览
型号: AK4122VQ
PDF下载: 下载PDF文件 查看货源
内容描述: 24位96kHz的SRC与DIR [24-Bit 96kHz SRC with DIR]
分类和应用: 消费电路商用集成电路
文件页数/大小: 53 页 / 363 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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ASAHI KASEI  
[AK4122]  
„ Sampling Frequency and Pre-emphasis Detection  
The AK4122 has two methods for detecting the sampling frequency. The sampling frequency is detected by comparing  
the recovered clock to the MCLK2 or OMCLK frequency, and the detected frequency is reported on FS3-0 bits. XTL1-0  
bits, ICKS1-0 bits and OCKS1-0 bits can select reference MCLK2 and OMCLK (Table 16). When XTL1-0 bits = “11”,  
the sampling frequency is detected by the channel status sampling frequency information. The detected frequency is  
reported on FS3-0 bits. The default values of FS3-0 bits are “0001”. In case of detecting the sampling frequency by  
MCLK when DIR is used, MCLK (MCLK2 or OMCLK) of selected output port (PORT2 or PORT3) should be input.  
MCLK2 or OMCLK  
XTL1  
0
XTL0  
0
MCLK Frequency  
ICKS1 / OCKS1  
ICKS0 / OCKS0  
0
0
1
1
0
0
1
1
0
0
1
1
-
0
1
0
1
0
1
0
1
0
1
0
1
-
11.2896MHz  
22.5792MHz  
16.9344MHz  
33.8688MHz  
12.288MHz  
24.576MHz  
18.432MHz  
36.864MHz  
24.576MHz  
N/A  
0
1
1
1
0
1
36.864MHz  
N/A  
Use channel status  
Default  
Table 16. Reference MCLK Frequency  
Except XTL1-0 bit = “11”  
XTL1-0 bit = “11”  
Consumer Mode  
Register Output  
Professional Mode  
fs  
Clock comparison  
(Note 1)  
(Note 2)  
Byte3  
Bit3,2,1,0  
Byte0  
Bit7,6  
Byte4  
Bit6,5,4,3  
FS3 FS2 FS1 FS0  
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
1
0
0
44.1kHz  
Reserved  
48kHz  
32kHz  
88.2kHz  
96kHz  
0000  
0001  
0010  
0011  
(1000)  
(1010)  
01  
(others)  
10  
0000  
0000  
0000  
0000  
1010  
0010  
± 3%  
-
± 3%  
± 3%  
± 3%  
11  
00  
00  
± 3%  
Table 17. fs Information  
Note 1. At least ±3% range is identified as the value in the Table 17. In case of an intermediate frequency of these two,  
FS3-0 bits indicate the nearer value. When the frequency is much larger than 96kHz or much smaller than 32kHz,  
FS3-0 bits may indicate “1100”, “1110” or “0001”.  
Note 2. In consumer mode, Byte3 Bit3-0 are copied to FS3-0.  
The pre-emphasis information is detected and reported on the PEM bit. This information is extracted from channel 1 by  
default (CS12 bit = “0”). It can be switched to channel 2 by changing the CS12 bit in the control register.  
Consumer mode  
Byte0  
Professional mode  
Byte0  
PEM bit Pre-emphasis  
Bit3,4,5  
Bit2,3,4  
0
1
OFF  
ON  
0X100  
0X100  
100  
100  
Table 18. PEM Information  
MS0267-E-02  
2004/07  
- 27 -  
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