ASAHI KASEI
[AK4115]
2-2. Consumer Mode (TVDD = 2.7V 5.5V)
∼
For consumer use , the specifications require an output impedance of 75 ohms 20% and a driver level of 0.5 20%
±
±
volts peak to peak. A combination of R1 in parallel with R2 meets this requirement. The outputs can be set to ground by
resetting the device or a software mute.
0.1uF
R1
TXP1
TXN1
75Ω cable
R2
TVDD R1
R2
Ω
Ω
Ω
Ω
3.3V
3.0V
5.0V
270
240
430
150
150
150
open
T1
Ω
Ω
Figure 26. Consumer Output Driver Circuit at AC coupling
PLL Loop Filter
C1 and R should be connected in series and attached between FILT pin and AVSS in parallel with C2. The value of PLL
Loop Filter includes temperature deviation. Be careful to minimize the noise into the FILT pin. When the Studio Sync
mode is not used, FILT pin can be open.
AK4115
FILT
R
C2
C1
AVSS
Figure 27. PLL Loop Filter
C1 [nF]
10 30%
C2 [pF]
100 30%
R [Ω]
24k 5%
±
±
±
Table 24. Value of PLL Loop Filter
MS0573-E-00
2006/12
- 32 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
