[AK1542A]
8. Block Functional Descriptions
1. Frequency Setup
The following formula is used to calculate the frequency setting for AK1542A.
Frequency setting (external VCO output frequency) = FPFD × N
N
: Dividing number N = [ (P × B) + A ]
FPFD
P
: Phase detector frequency FPFD = [REFIN] pin input frequency / R counter dividing number
: Prescaler Value (See<Address2>:{Pre[1:0]})
B
: B (Programmable) counter value (See <Address1>:{B[12:0]})
: A (Swallow) counter value (See <Address1>:{A[5:0]})
A
Calculation examples
When the [REFIN] pin input frequency is 10MHz, the phase detector frequency FPFD =5kHz and the frequency setting =
460.1MHz;
[The AK1542A Settings]
R=10000000/5000 = 2000 (<Address3> : {R[13:0]}=2000dec)
P=32 (<Address2>:{Pre[1:0]} =10bin)
B=2875 (<Address1>:{B[12:0]} =2875dec)
A=20 (<Address1>:{A[5:0]} =20dec)
Frequency setting = 5000 × [ (32×2875) + 20] = 460.1MHz
Lower limit for setting consecutive dividing numbers
In the AK1542A, it is impossible to set consecutive dividing numbers below the lower limit. The lower limit is calculated by
the following formula;
Nmin=P2-P
For example, in the case of P=16, it can be set 240 and over as consecutive dividing numbers.
MS1399-E-00
2012/3
- 11 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
