[AK1542A]
2. Serial Interface Timing
<Write-In Timing>
Tle
Tlesu
Tcsu
LE
(Input)
Tch Tcl
CLK
(Input)
Tsu
Thd
DATA
(Input)
D19
D0
D19
D18
A3
A2
A1
A0
Fig. 3 Serial Interface Timing
Table 5 Serial Interface Timing
Parameter
Symbol
Tcl
Min.
40
40
20
20
20
20
40
Typ.
Max.
Unit
ns
Remarks
Clock L level hold time
Clock H level hold time
Clock setup time
Data setup time
Tch
ns
Tcsu
Tsu
ns
ns
Data hold time
Thd
Tlesu
Tle
ns
LE Setup Time
ns
LE Pulse Width
ns
Note 1) While [LE] pin is setting at “Low”, 24 iteration clocks have to be set with [CLK] pin. If 25 or larger clocks are set, the
last 24 clocks synchronized data are valid.
MS1399-E-00
2012/3
- 8 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
