[AK1542A]
4. Lock Detect (LD) Signal
In AK1542A, the lock detect output can be selected by D[13] = {LD} in <Address4>. When D[13] is set to “1", the phase
detector outputs provide a phase detection as an analog level (comparison result). This is called “analog lock detect”.
When D[13] is set to “0”, the lock detect signal is output according to the internal logic. This is called “digital lock detect”.
4.1 Analog Lock Detect
In analog lock detect, the phase detector output comes from the LD pin.
Reference clock
PFD clock
VCO divide clock
Phase detector output
LD output
Fig. 7 Analog Lock Detect Operation
MS1399-E-00
2012/3
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AKM [ ASAHI KASEI MICROSYSTEMS ]
