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HDMP-1685A 参数 Datasheet PDF下载

HDMP-1685A图片预览
型号: HDMP-1685A
PDF下载: 下载PDF文件 查看货源
内容描述: 安捷伦HDMP - 1685A 1.25 Gbps的四通道的SerDes与5针DDR SSTL_2并行接口 [Agilent HDMP-1685A 1.25 Gbps Four Channel SerDes with 5-pin DDR SSTL_2 Parallel Interface]
分类和应用: 电信集成电路电信电路双倍数据速率
文件页数/大小: 20 页 / 292 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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HDMP-1685A TRx I/O Definition, continued  
Name  
Pin  
Type  
Signal  
V
CC  
A02  
A10  
C14  
G04  
J14  
K16  
L04  
N15  
R04  
R14  
R16  
T03  
T04  
T14  
U05  
S
Power Supply: Normally 3.3 volts. Used for logic, SSTL inputs, and LVTTL I/O.  
VCCA  
VCR0  
T09  
S
S
Analog Power Supply: Normally 3.3 volts. Used to provide a clean supply line for the  
PLLs and high-speed analog cells.  
C04  
D03  
F03  
A09  
B07  
C05  
A13  
A16  
C11  
C15  
E14  
G17  
Rx SSTL2 Output Power Supply: Normally 3.3 volts. Used for all SSTL2 receiver  
output buffer cells.  
VCR1  
VCR2  
VCR3  
VCP0  
VCP1  
VCP2  
VCP3  
T05  
T07  
T11  
T13  
S
S
High-Speed Output Supply: Normally 3.3 volts. Used only for the last stage  
of the high-speed transmitter output cells (HS_OUT) as shown in Figure 10.  
Due to high current transitions, this V should be well bypassed to a ground plane.  
CC  
GNDA  
R08  
Analog Ground: Normally 0 volts. All GND pads on the chip are connected to one  
ground slug in the package, which then distributes these to GND balls.  
16