V
CC
(SERDES) = 3.3 V
V
CC
(SERDES) = 3.3 V
R
1
V
DDQ
(MAC)
V
CC
(MAC)
V
CC
0.1 µF
VREFR
R
2
V
CC
VDDQ
VREFT
RX[0:3][0:4]
RC[0:3][0:1]
RS = 50
Ω
UNTERMINATED
DATAIN
TX[0:3][0:4]
TC
RS = 50
Ω
USE TERMINATION, IF NECESSARY, TO
DELIVER PROPER VOLTAGE SWINGS AT TX[0:4]
V
DDQ
(MAC)
R
1
DATAOUT
VREFT
0.1 µF
R
2
HDMP-1685
MAC
NOTE: VREFR ON EACH DEVICE MAY BE USED TO DRIVE VREFT ON THE OTHER DEVICE INSTEAD OF USING
THE CONFIGURATION ABOVE. VREFR SHOULD BE BYPASSED WITH 0.1 µF IN THIS CASE. IF USED, R
1
AND R
2
SHOULD BE 500-1000
Ω.
1% RESISTORS SHOULD BE USED FOR R
1
AND R
2
. WHEN USING THE CONFIGURATION
ABOVE, VREFT TO THE MAC SHOULD BE SET TO 1.25 V NOMINAL. USING THIS VALUE CENTERS VREFR RELATIVE
TO THE RX[0:3][0:4] OUTPUT SWINGS PROVIDED BY THE HDMP-1685A.
Figure 11. O-SSTL_2 and I-SSTL_2 simplified circuit schematic.
01
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
TX04
TX14
RX04
GND
02
V
CC
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
GND SYN1 RC10 RX10 RX14
GND RC11 RX11
VCR1
VCR0 VCR1
RX12 GND
VCR1
V
CC
GND RX21
VCR2
GND
VCR2
GND
SYN3 RC30 RC31
V
CC
VCR3
GND RX30
RX31 RX32 RX33 RX34
VCR3
GND
GND
GND SYN2 RX20 RX22
RC20
VCR2
RX23
RC21 GND RX24
RX00 RX01
VCR0
GND GND RX13 VRFR
RC00 RC01 RX02 RX03
SYN0
VCR0
GND
GND
V
CC
GND
GNDA
V
CCP
V
CC
V
CCA
VCR
TX22 TX21 TX20
VCR3
TX24 TX23
V
CC
GND GND
V
CC
TC
TX10 TX11 TX12 TX13
GND GND
GND
V
CC
TX33 TX32 TX31 TX30
TX34
PLUP V
CC
TX00 TX01 TX02 TX03
VRFT
RFCT
GND
GND
V
CC
GND SO0— GND SO1— GND CAP0 GND SO2+ GND SO3+
V
CC
SO0+ GND SO1+ GNDA CAP1 GND SO2— GND SO3— V
CC
V
CC
VCP0 GND VCP1 GND V
CCA
GND VCP2 GND VCP3 V
CC
V
CC
GND
V
CC
SYNC
GND GND
GND GND SIO— SI0+
SI1— SI1+ GND GND SI2— SI2+ GND SI3— SI3+ GND GND GND
Figure 12. Pinout of HDMP-1685A (top view).
12
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