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HCPL0630 参数 Datasheet PDF下载

HCPL0630图片预览
型号: HCPL0630
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道,高CMR ,高速, TTL兼容光电耦合器8引脚DIP和SOIC -8 [Dual Channel, High CMR, High Speed, TTL Compatible Optocouplers 8 Pin DIP and SOIC-8]
分类和应用: 光电
文件页数/大小: 10 页 / 166 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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H
group of optocouplers which are
operating under the same
conditions (i.e., the same drive
current, supply voltage, output
load, and operating tempera-
ture). As illustrated in Figure
17, if the inputs of a group of
optocouplers are switched either
ON or OFF at the same time,
t
PSK
is the difference between
the shortest propagation delay,
either t
PHL
or t
PHL
, and the
longest propagation delay,
either t
PLH
or t
PHL
.
As mentioned earlier, t
PSK
can
determine the maximum
parallel data transmission rate.
Figure 18 is the timing diagram
of a typical parallel data
application with both the clock
and the data lines being sent
through optocouplers. The
figure shows data and clock
signals at the inputs and
outputs of the optocouplers. To
obtain the maximum data
transmission rate, both edges of
the clock signal are being used
to clock the data; if only one
edge were used, the clock signal
would need to be twice as fast.
Propagation delay skew
represents the uncertainty of
where an edge might be after
being sent through an
optocoupler. Figure 18 shows
that there will be uncertainty in
both the data and the clock
lines. It is important that these
two areas of uncertainty not
overlap, otherwise the clock
signal might arrive before all of
the data outputs have settled, or
some of the data outputs may
start to change before the clock
signal has arrived. From these
considerations, the absolute
minimum pulse width that can
be sent through optocouplers in
a parallel application is twice
t
PSK
. A cautious design should
use a slightly longer pulse width
to ensure that any additional
uncertainty in the rest of the
circuit does not cause a
problem.
The t
PSK
specified optocouplers
offers the advantages of
guaranteed specifications for
propagation delays, pulse-width
distortion and propagation
delay skew over the
recommended temperature,
input current, and power supply
ranges.
DATA
INPUTS
CLOCK
V
O
1.5 V
I
F
50%
I
F
50%
DATA
OUTPUTS
t
PSK
V
O
1.5 V
t
PSK
CLOCK
t
PSK
Figure 17. Illustration of Propagation Delay
Skew - t
PSK
.
Figure 18. Parallel Data Transmission Example.
For more information call: United States: call your local HP sales office listed in your telephone directory. Ask for a Components
representative. Canada: (416) 206-4725 Europe: (49) 7031/14-0 Asia Pacific/Australia: (65) 290-6360 Japan: (81 3) 3331-6111
Printed in U.S.A.
Data Subject to Change
Obsoletes 5954-1031 (1/86), 5954-0960 (12/83)
Copyright © 1993 Hewlett-Packard Co.
5091-9125E (12/93)