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A316J 参数 Datasheet PDF下载

A316J图片预览
型号: A316J
PDF下载: 下载PDF文件 查看货源
内容描述: 2.0安培门驱动光电耦合器与集成( VCE)去饱和检测和故障状态反馈 [2.0 Amp Gate Drive Optocoupler with Integrated (Vce) Desaturation Detection and Fault Status Feedback]
分类和应用: 光电驱动
文件页数/大小: 34 页 / 619 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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23  
Slow IGBT Gate  
Discharge During Fault  
Condition  
When a desaturation fault is  
detected, a weak pull-down  
device in the HCPL-316J output  
drive stage will turn on to ‘softly’  
turn off the IGBT. This device  
slowly discharges the IGBT gate  
to prevent fast changes in drain  
current that could cause  
damaging voltage spikes due to  
lead and wire inductance. During  
the slow turn off, the large output  
pull-down device remains off until  
value can be scaled slightly to  
adjust the blanking time, though  
a value smaller than 100 pF is not  
recommended. This nominal  
blanking time also represents the  
longest time it will take for the  
HCPL-316J to respond to a  
DESAT fault condition. If the  
IGBT is turned on while the  
collector and emitter are shorted  
to the supply rails (switching into  
a short), the soft shut-down  
sequence will begin after  
approximately 3 µsec. If the IGBT  
collector and emitter are shorted  
to the supply rails after the IGBT  
is already on, the response time  
will be much quicker due to the  
parasitic parallel capacitance of  
the DESAT diode. The  
recommended 100 pF capacitor  
should provide adequate blanking  
as well as fault response times for  
most applications.  
region and quickly overheat. The  
UVLO function causes the output  
to be clamped whenever  
insufficient operating supply  
(V  
CC2  
) is applied. Once V  
CC2  
exceeds V  
(the positive-  
UVLO+  
going UVLO threshold), the  
UVLO clamp is released to allow  
the device output to turn on in  
response to input signals. As  
V
CC2  
is increased from 0 V (at  
some level below V  
), first  
UVLO+  
the DESAT protection circuitry  
becomes active. As V is  
CC2  
further increased (above  
), the UVLO clamp is  
V
UVLO+  
the output voltage falls below V  
+ 2 Volts, at which time the large  
pull down device clamps the  
EE  
released. Before the time the  
UVLO clamp is released, the  
DESAT protection is already  
active. Therefore, the UVLO and  
DESAT FAULT DETECTION  
features work together to provide  
seamless protection regardless of  
IGBT gate to V .  
EE  
DESAT Fault Detection  
Blanking Time  
The DESAT fault detection  
circuitry must remain disabled for  
a short time period following the  
turn-on of the IGBT to allow the  
collector voltage to fall below the  
DESAT theshold. This time  
period, called the DESAT  
supply voltage (V ).  
CC2  
Under Voltage Lockout  
The HCPL-316J Under Voltage  
Lockout (UVLO) feature is  
designed to prevent the  
application of insufficient gate  
voltage to the IGBT by forcing  
the HCPL-316J output low during  
power-up. IGBTs typically require  
gate voltages of 15 V to achieve  
blanking time, is controlled by  
the internal DESAT charge  
current, the DESAT voltage  
threshold, and the external  
DESAT capacitor. The nominal  
blanking time is calculated in  
terms of external capacitance  
their rated V  
voltage. At  
CE(ON)  
gate voltages below 13 V  
typically, their on-voltage  
(C  
), FAULT threshold  
BLANK  
increases dramatically, especially  
at higher currents. At very low  
gate voltages (below 10 V), the  
IGBT may operate in the linear  
voltage (V  
charge current (I  
), and DESAT  
DESAT  
) as  
CHG  
t
= C  
x V  
/ I  
.
BLANK  
BLANK  
DESAT CHG  
The nominal blanking time with  
the recommended 100 pF  
capacitor is 100 pF * 7 V / 250 µA  
= 2.8 µsec. The capacitance  
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