T9000
Preliminary Data Sheet
November 2000
ISDN Network Termination Node (NTN) Device
11 GPIO Ports (continued)
Note: Alternate pin functions, shown in parentheses (), are selected when the TEST pin is asserted.
Alternate pin functions, shown in brackets [], are selected when the corresponding register bits are set.
.0
.1
.2
.3
.4
.5
.6
.7
α
.0
.1
.2
.3
.4
.5
.6
.7
α
.0
.1
.2
.3
.4
.5
.6
.7
δ
α
α
[BCLK]
[FSC]
[SYNCO]
α
α
α
α
(USSP_E)
χ [T0]
χ [T1]
χ [T2]
[PWMO00]
[PWMO01]
[PWMO10]
[PWMO11]
[MTC]
(PTLB_S)
GPIO0
GPIO1
GPIO2
LEGEND:
α : External interrupt capability.
χ : Optional trigger sources for timers.
δ : 6 mA sink capability.
: Schmitt trigger when inputs.
5-6529F.c
Figure 20. GPIO Pin Capabilities Summary
11.1 GPIO Register Set
Table 90. GPDIR0: GPIO Port 0 Pin Direction (0x38)
Reg
R/W
Bit 7
DIR0.7
1
Bit 6
DIR0.6
1
Bit 5
DIR0.5
1
Bit 4
DIR0.4
1
Bit 3
DIR0.3
1
Bit 2
DIR0.2
1
Bit 1
DIR0.1
1
Bit 0
GPDIR0
R/W
DIR0.0
1
RESET Default
Bit #
Symbol
Name/Description
7—0
DIR0.[7:0]
GPIO0.[7:0] Pin Direction.
0: Output.
1: Input.
Note: When any of bits 7:4 in register GPAF0 are set, the corresponding DIR0.x value in
this register is ignored and the pin function is determined according to the GPAF0
register function.
86
Lucent Technologies Inc.
AGERE [ AGERE SYSTEMS ]
